Datasheet

ELECTRICAL CHARACTERISTICS: V
S
= ± 6V
THS6214
www.ti.com ....................................................................................................................................................................................................... SBOS431 – MAY 2009
At T
A
= +25 ° C, G
DIFF
= +5V/V with R
L
= 100 Ω differential load, R
ADJ
= 0 Ω , active impedance circuit configuration, and full bias,
unless otherwise noted. Each port is independently tested.
THS6214IRHF, IPWP
TEST
PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL
(1)
AC PERFORMANCE
G
DIFF
= +5V/V , R
F
= 1.5k Ω , V
O
= 2V
PP
140 MHz C
Small-signal bandwidth,
G
DIFF
= +10V/V , R
F
= 1.5k Ω , V
O
= 2V
PP
110 140 MHz B
– 3dB (V
O
= 2V
PP
)
T
A
= – 40 ° C to +85 ° C 95 MHz B
0.1dB bandwidth flatness G
DIFF
= +10V/V , R
F
= 1.24k Ω 100 MHz C
Large-signal bandwidth G
DIFF
= +5V/V , R
F
= 1.24k Ω , V
O
= 20V
PP
120 MHz C
Slew rate (10% to 90% level) G
DIFF
= +10V/V, V
O
= 20V step, differential 1200 1600 V/ µ s B
Over – 40 ° C to +85 ° C temperature range 1000 V/ µ s B
Rise and fall time G
DIFF
= +10V/V, V
O
= 2V
PP
5 ns C
G
DIFF
= +10V/V, V
O
= 2V
PP
, f = 1MHz, R
L
= 100 Ω
Harmonic distortion C
differential
2nd harmonic Full bias – 98 -92 dBc B
T
A
= – 40 ° C to +85 ° C -87 dBc B
Low bias – 93 dBc C
3rd harmonic Full bias – 93 -84 dBc B
T
A
= – 40 ° C to +85 ° C -79 dBc B
Low bias – 89 dBc C
2nd harmonic Full bias – 80 -75 dBc B
T
A
= – 40 ° C to +85 ° C -68 dBc B
Low bias – 74 dBc C
3rd harmonic Full bias – 66 -60 dBc B
T
A
= – 40 ° C to +85 ° C -54 dBc B
Low bias – 55 dBc C
Differential input voltage noise f = 1MHz, input-referred 2.5 3.0 nV/ √ Hz B
T
A
= – 40 ° C to +85 ° C 3.3 nV/ √ Hz B
Differential noninverting current
f = 1MHz 1.2 1.4 pA/ √ Hz B
noise
T
A
= – 40 ° C to +85 ° C 1.6 pA/ √ Hz B
Differential inverting current noise f = 1MHz 17 20 pA/ √ Hz B
T
A
= – 40 ° C to +85 ° C 24 pA/ √ Hz B
DC PERFORMANCE
Open-loop transimpedance gain R
L
= 100 Ω 330 650 k Ω A
T
A
= – 40 ° C to +85 ° C 300 k Ω B
Input offset voltage ± 10 ± 45 mV A
T
A
= – 40 ° C to +85 ° C ± 55 mV B
Input offset voltage drift T
A
= – 40 ° C to +85 ° C ± 155 µ V/ ° C B
Input offset voltage matching Channels 1 to 2 and 3 to 4 only ± 0.5 ± 5 mV A
T
A
= – 40 ° C to +85 ° C ± 7 mV B
± 1 ± 3.5 µ A A
Noninverting input bias current
T
A
= – 40 ° C to +85 ° C ± 5.5 µ A B
Noninverting input bias current drift T
A
= – 40 ° C to +85 ° C ± 30 nA/ ° C B
± 8 ± 45 µ A A
Inverting input bias current
T
A
= – 40 ° C to +85 ° C ± 55 µ A B
Inverting input bias current drift T
A
= – 40 ° C to +85 ° C ± 135 nA/ ° C B
± 8 ± 30 µ A A
Inverting input bias current
matching
T
A
= – 40 ° C to +85 ° C ± 40 µ A B
(1) Test levels: (A) 100% tested at +25 ° C. Over-temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
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