Datasheet

THS6184
www.ti.com ................................................................................................................................................. SLLS635D – AUGUST 2005 – REVISED JANUARY 2009
ELECTRICAL CHARACTERISTICS (continued)
At V
S
= ± 5 V: R
F
= 3 k Ω , R
L
= 50 Ω , G = 5, R
adj
= 0, full bias (unless otherwise noted). Each amplifier independently tested
TYP OVER TEMPERATURE
PARAMETER CONDITIONS
0 ° C to – 40 ° C MIN/
25 ° C 25 ° C UNITS
70 ° C to 85 ° C MAX
D1 to D2, D3 to D4 – 35 dB Typ
f = 1 MHz,
Crosstalk
V
O
= 2 V
PP
D1 to D3, D2 to D4 – 70 dB Typ
POWER SUPPLY
Maximum operating voltage ± 16 ± 16 ± 16 V Max
Minimum operating voltage ± 4 ± 4 ± 4 V Min
Per amplifier, Full (Bias-1 = 0, Bias-2 = 0) 3.9 4.4 4.5 4.6 mA Max
Per amplifier, Mid (Bias-1 = 1, Bias-2 = 0) 2.9
Maximum Is+ quiescent current
Per amplifier, Low (Bias-1 = 0, Bias-2 = 1) 2 mA Typ
Per amplifier, Off (Bias-1 = 1, Bias-2 = 1) 0.2
Minimum Is+ quiescent current Per amplifier, Full (Bias-1 = 0, Bias-2 = 0) 3.9 3.2 3 3 mA Min
Per amplifier, Full (Bias-1 = 0, Bias-2 = 0) 3.7 4.2 4.3 4.4 mA Max
Per amplifier, Mid (Bias-1 = 1, Bias-2 = 0) 2.7
Maximum ls – quiescent current
Per amplifier, Low (Bias-1 = 0, Bias-2 = 1) 1.8 mA Typ
Per amplifier, Off (Bias-1 = 1, Bias-2 = 1) 0.01
Minimum Is- quiescent current Per amplifier, Full Bias 3.7 3.1 2.9 2.9 mA Min
Current through GND pin Per amplifier, Full (Bias-1 = 0, Bias-2 = 0) 0.2 mA Typ
Power supply rejection (+PSRR) V
S+
= 6 V to 4 V, V
S –
= – 5 V 76 70 68 67 dB Min
Power supply rejection ( – PSRR) V
S+
= 5 V, V
S –
= – 6 V to – 4 V 70 64 62 61 dB Min
LOGIC CHARACTERISTICS
Logic 1, with respect to GND pin
(1)
≥ 2.6 V Typ
Bias control pin logic threshold
Logic 0, with respect to GND pin
(1)
≤ 0.8 V Typ
Bias-X = 0.5 V (Logic 0) 1 10 15 15
Bias pin quiescent current µ A Max
Bias-X = 3.3 V (Logic 1) 10 20 30 30
Turn on time delay(t
(ON)
) 1
Time for I
S
to reach 50% of final value µ s Typ
Turn off time delay (t
(Off)
) 1
Bias pin input impedance 50 k Ω Typ
Amplifier output impedance Off (Bias-1 = 1, bias-2 = 1) 10||5 k Ω ||pF Typ
(1) GND pin useable range is from V
S –
to (V
S+
– 2.5 V).
Table 2. LOGIC TABLE
(1)
BIAS-1 BIAS-2 FUNCTION DESCRIPTION
0 0 Full Bias Mode Amplifiers ON with lowest distortion possible (default state)
1 0 Mid Bias Mode Amplifiers ON with power savings with a reduction in distortion performance
0 1 Low Bias Mode Amplifiers ON with enhanced power savings and a reduction of performance
1 1 Shutdown Mode Amplifiers OFF and output has high impedance
(1) Logic pins should not be left floating and should be held by external circuitry to a logic-1 or a logic-0.
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