THS6182DWEVM User’s Guide August 2003 High Performance Linear Products SLOU152A
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range described in the EVM User’s Guide. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
Information About Cautions and Warnings Preface About This Manual How to Use This Manual This document contains the following chapters: - Chapter 1 − Introduction and Description - Chapter 2 − Using the THS6182DWEVM - Chapter 3 − THS6182DWEVM Applications - Chapter 4 − EVM Hardware Description Information About Cautions and Warnings This book may contain cautions and warnings. This is an example of a caution statement.
Trademarks FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference.
Contents 1 Introduction and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Evaluation Modue Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 THS6182DWEVM Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 EVM Default Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents 1−1 2−1 3−1 3−2 3−3 3−4 3−5 4−1 4−2 4−3 4−4 Full Schematic of the Populated Circuit on the THS6182DWEVM (Default Configuration) Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Default Configuration Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differential Positive Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 The Texas Instruments THS6182DW evaluation module (EVM) helps designers evaluate the performance of the THS6182 operational amplifier. Also, this EVM is a good example of high-speed PCB design. This document details the THS6182DWEVM.
Evaluation Modue Features 1.1 Evaluation Modue Features The THS6182EVM provides a platform for developing high-speed operational amplifier application circuits. It contains the THS6182 high-speed dual operational amplifier, a number of passive components, and various features and footprints that enable the user to experiment with, test, and verify various operational amplifier circuit implementations. The PC board measures 4.0 by 2.8 inches.
EVM Default Configuration Figure 1−1. Full Schematic of the Populated Circuit on the THS6182DWEVM (Default Configuration) 18 +V Z1 J2 IN2 R9 0W R8 8 0W * + 1 TP2 TP1 U1A THS6182 J1 R6 2 − 12.4 W 49.9 W 3 R10 49.9 W R5 R4 * OUT1 R7 R2 1.5 kW −V * R3 C2 * R1 R23 750 W Z3 * * C1 * R26 R22 * 0.1 mF C5 * * R12 * R13 * R14 * Z2 J4 IN2 R18 0W R17 13 TP3 − 19 + U1B THS6182 0W R19 49.9 W * TP4 J3 R15 R16 12.4 W 49.
1-4
Chapter 2 !"# This section describes how to connect the THS6182DWEVM to test equipment. It is recommended that the user connect the EVM as described in this section to avoid damage to the EVM or the THS6182 installed on the board. Figure 2−1.
Figure 2−1 shows the connections to measure the output signal of output 1 while a single-ended signal is inserted into EVM channel 1’s noninverting input. If the oscilloscope input is connected to J3 and the signal source is connected to J2, EVM channel 2 is also configured for a noninverting signal path. When the oscilloscope’s input impedance is 50 Ω, the voltage gain from J2 to J3 is 1.33 V.
Chapter 3 !"# $ Example applications are presented in this chapter. These applications demonstrate the most popular circuits, but many other circuits can be constructed. The user is encouraged to experiment with different circuits, exploring new and creative design techniques. Topic Page 3.1 Standard Gain Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.2 Active Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Standard Gain Configuration 3.1 Standard Gain Configuration The THS6182DWEVM default configuration is a fully differential input, fully differential output gain of about 2.2 (at the output connectors using an instrument with 50-Ω load on each input). A simplified schematic is shown in Figure 3−1.
Active Termination 3.2 Active Termination Although this application is specifically for use as an ADSL line driver, the principals shown can be applied to other applications. Active termination is a technique that allows the designer to use a small value resistor for the series resistance (R6 and, or R15). The circuit then utilizes positive feedback to make the impedance of this resistor appear much larger, when looking from the line-side.
Active Termination Active feedback creates larger impedance (Z) than what is actually placed there by series resistors RS: Z(W) + R S R 1– F R P (2) The important thing to consider is that regardless of the forward gain from Vin to Vo, the active impedance (Z) value remains constant. Solving equation 2 for Rp, the following equation is produced: R + P R F R (3) 1* S P Using Z = 50 Ω and values from Figure 3−2 in equation 3, yields 1995 Ω for RP.
Active Termination resistor isolation between the amplifier and the transformer, causing a resonance problem. Couple this with the feedback path of R3 and R12, and this can cause the amplifier to oscillate. The snubber is utilized to eliminate this oscillation. As a rule of thumb, to select the proper snubber values, select: R19 + 2 R LINE n2 (6) Then select C5: C5 + 2 p 1 R19 F (7) C where FC = at least 10X the highest operating frequency (1.104 MHz is the highest ADSL operating frequency).
Receive Path Implementation 3.3 Receive Path Implementation Test points TP1 through TP4 are located on the EVM to facilitate the addition of the receive signal path to the signal chain as shown in Figure 3−3. When implementing the receive path, a hybrid must be used as ADSL is full duplex. The hybrid cancels out the TX signal and allows the RX signal from the line to come through. The THS6182DWEVM does not have receive or hybrid circuitry included.
High-Pass Filter 3.4 High-Pass Filter Because ADSL CPE is designed to transmit from 25.875 kHz to 138 kHz, C2 and R23 can be used to implement an HPF function. These are selected to be 20X lower than 25 kHz (1.25 kHz). Some designs use a capacitor—some do not. This path allows for a common gain setting between the two channels. This helps (but does not assure) the signals are truly differential. Figure 3−4 compares the frequency spectrum of ADSL to a simulation of the high-pass filter on the THS6182DWEVM.
Single-Ended Gain Stages 3.5 Single-Ended Gain Stages Although ADSL is the obvious application for the THS6182DWEVM, it can also be configured for other applications. If the common gain resistor R8 is removed, there is an array of components that allow various dc and ac coupled gain stages to be constructed. Referring to Figure 3−5, for example, two dc coupled gain stages are formed by removing R9 and adding R4 and R14. There are many other possibilities. Figure 3−5.
Chapter 4 !"# % This chapter describes the EVM hardware. It includes the EVM parts list, and printed circuit-board layout. Table 4−1. THS6182DWEVM Bill of Materials Description SMD Size Reference Designator Manfacturer’s Part # Distributor’s Part # 1 Bead, ferrite, 3A, 80 Ω 1206 FB1, FB2 2 (Steward) HI1206N800R−00 (Digi−Key) 240−1010−1−ND 2 CAP, 22 µF, tantalum, 25 V, 10% D C6, C7 2 (AVX) TAJD226K025R (Garrett) TAJD226K025R 3 CAP, 0.
Table 4−1. THS6182DWEVM Bill of Material (Continued) Item Description SMD Size Reference Designator PCB QTY Manfacturer’s Part # Distributor’s Part # 17 Connector, BNC, vertical, PCB J1, J2, J3, J4 4 (Amphenol) 31−5329 (Newark) 89F2885 18 Jack, banana, 0.25” diameter hole J5, J6, J7 3 (HH Smith) 101 (Newark) 35F865 19 Header, 0.1” centers, 0.
Figure 4−2. Internal Plane (Layer 2) (Ground 1 Plane) Figure 4−3.
Figure 4−4.
