Datasheet
Description
1-2
1.1 Description
The THS6043EVM provides a platform for developing high-speed op amp
application circuits. It contains the THS6043 high-speed dual op amp, a
number of passive components, and various features and footprints that
enable the user to experiment, test, and verify various operational amplifier
circuit implementations. The PC board measures 4.21 by 2.88 inches.
1.2 Evaluation Module Features
THS6043 high-speed operational amplifier EVM features include:
- Differential noninverting gain configuration for DSL
- Active termination capability (R6 and R11)
- Snubber circuit (R19 and C5), for use with active termination
- HPF function (C3 and R7)
- Hooks for a receive path signal (TP1 through TP4)
- Virtual ground capability (JP1, R20, R21)
- Power down capability (R25, R26, R27, JP2)
- Single supply capability (R4, R14, R20, R21, C9, JP1, Z1, Z2)
- Single-ended noninverting gain stage capability (R8, R9, R23, R24, Z3)
- Single-ended inverting gain stage capability (R3, R4, R14, R15)
- Power supply decoupling components (C6−C15, FB1, FB2)
- Short-loop length for the power supply differential high-frequency path
(C8)
1.3 THS6043EVM Operating Conditions
Supply voltage range, ±V
CC
±5 V to ±15 V (see the device data sheet)
Supply current, I
CC
(see the device data sheet)
For complete THS6043 amplifier IC specifications, parameter measurement
information, and additional application information, see the THS6043 data
sheet, TI literature number SLOS264.
1.4 EVM Default Configuration
The EVM has a fully functional example circuit; just add power supplies, a
signal source, and monitoring instrument. See Figure 1−1 for the default
schematic diagram. The complete EVM schematic in Chapter 5 shows all
component locations.
The default configuration assumes a differential gain, as determined by R5,
R16, and R7 in combination with series matching resistors R17 and R18, and
assumes a 50-Ω load on the outputs at J6 and J7.
Some components such as R10, R25 through R27, C6 through C15, FB1,
FB2, JP1, J3, J4, and J5 are omitted on the application schematics of Chapter
3 for clarity.