Datasheet

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 
SLAS201A − DECEMBER 1999 − REVISED SEPTEMBER 2002
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, AV
DD
= 5 V,
DV
DD
= 5 V, IOUT
FS
= 20 mA, differential transformer coupled output, 50 Ω doubly terminated load
(unless otherwise noted)
ac specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Analog output
f
CLK
Maximum output update rate
DV
DD
= 4.5 V to 5.5 V 100 125
MSPS
f
CLK
Maximum output update rate
DV
DD
= 3 V to 3.6 V 70 100
MSPS
t
s(DAC)
Output settling time to 0.1%
†
35 ns
t
pd
Output propagation delay 1 ns
GE Glitch energy
‡
Worst case LSB transition (code 8191 − code 8192) 5 pV-s
t
r(IOUT)
Output rise time 10% to 90%
†
1 ns
t
f(IOUT)
Output fall time 90% to 10%
†
1 ns
Output noise
IOUT
FS
= 20 mA 15
pA/√HZ
Output noise
IOUT
FS
= 2 mA
10
pA/√HZ
AC linearity
§
f
CLK
= 25 MSPS, f
OUT
= 1 MHz, T
A
= 25°C −74
THD
Total harmonic distortion
f
CLK
= 50 MSPS, f
OUT
= 1 MHz, T
A
= −40°C to 85°C −73 −66
dBc
THD Total harmonic distortion
f
CLK
= 50 MSPS, f
OUT
= 2 MHz, T
A
= 25°C
−71
dBc
f
CLK
= 100 MSPS, f
OUT
= 2 MHz, T
A
= 25°C −71
f
CLK
= 25 MSPS, f
OUT
= 1 MHz, T
A
= 25°C 82
f
CLK
= 50 MSPS, f
OUT
= 1 MHz, T
A
= −40°C to 85°C 68
f
CLK
= 50 MSPS, f
OUT
= 1 MHz, T
A
= 25°C 82
dBc
Spurious free dynamic range to
f
CLK
= 50 MSPS, f
OUT
= 2.51 MHz, T
A
= 25°C 75
dBc
Spurious free dynamic range to
Nyquist
f
CLK
= 50 MSPS, f
OUT
= 5.02 MHz, T
A
= 25°C 74
SFDR
Nyquist
f
CLK
= 50 MSPS, f
OUT
= 20.2 MHz, T
A
= 25°C 57
SFDR
f
CLK
= 100 MSPS, f
OUT
= 5.04 MHz, T
A
= 25°C 70 dBc
f
CLK
= 100 MSPS, f
OUT
= 20.2 MHz, T
A
= 25°C 66 dBc
f
CLK
= 100 MSPS, f
OUT
= 40.4 MHz, T
A
= 25°C 63 dBc
Spurious free dynamic range
f
CLK
= 50 MSPS, f
OUT
= 1 MHz, T
A
= 25°C,1 MHz span 90
Spurious free dynamic range
within a window
f
CLK
= 50 MSPS, f
OUT
= 5.02 MHz, 2 MHz span 89
dBc
within a window
f
CLK
= 100 MSPS, f
OUT
= 5.04 MHz, 4 MHz span 89
dBc
†
Measured single ended into 50 Ω load at IOUT1.
‡
Single-ended output IOUT1, 50 Ω doubly terminated load.
§
Measured with a 50%/50% duty cycle (high/low percentage of the clock). Optimum ac linearity is obtained when limiting the duty cycle to a range
from 45%/55% to 55%/45%.