Datasheet
THS4531A
SLOS823A –DECEMBER 2012–REVISED JANUARY 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGING/ORDERING INFORMATION
(1)
SPECIFIED
CHANNEL PACKAGE- PACKAGE PACKAGE ORDERING TRANSPORT MEDIA,
PRODUCT TEMPERATURE
COUNT LEAD DESIGNATOR MARKING NUMBER QUANTITY
RANGE
1 T4531A THS4531AID Rails, 75
SOIC-8 D –40°C to +125°C
1 T4531A THS4531AIDR Tape and reel, 2500
1 531A THS4531AIDGK Rails, 80
THS4531A VSSOP-8 DGK –40°C to +125°C
1 531A THS4531AIDGKR Tape and reel, 2500
1 531A THS4531AIRUNT Tape and reel, 250
WQFN-10 RUN –40°C to +125°C
1 531A THS4531AIRUNR Tape and reel, 3000
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
VALUE UNITS
Supply voltage, V
S–
to V
S+
5.5
Input/output voltage, V
IN±
, V
OUT±
, and V
OCM
pins (V
S–
) – 0.7 to (V
S+
) + 0.7 V
Differential input voltage, V
ID
1 V
Continuous output current, I
O
50 mA
Continuous input current, I
i
0.75 mA
Continuous power dissipation See Thermal Information
Maximum junction temperature, T
J
150 °C
Operating free-air temperature range, T
A
–40 to +125 °C
Storage temperature range, T
stg
–65 to +150 °C
Electrostatic Human body model (HBM) 3 kV
discharge (ESD)
Charge device model (CDM) 500 V
ratings:
THERMAL INFORMATION
THS4531A THS4531A THS4531A
VSSOP
SOIC WQFN
THERMAL METRIC
(1)
(MSOP) UNITS
(P) (RUN)
(DGK)
8 PINS 8 PINS 10 PINS
θ
JA
Junction-to-ambient thermal resistance 133 198 163
θ
JCtop
Junction-to-case (top) thermal resistance 78 84 66
θ
JB
Junction-to-board thermal resistance 73 120 113
°C/W
ψ
JT
Junction-to-top characterization parameter 26 19 17
ψ
JB
Junction-to-board characterization parameter 73 118 113
θ
JCbot
Junction-to-case (bottom) thermal resistance N/A N/A N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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