Datasheet
49.9 W
-
+
J1
R12
C15
0.22 Fm
R1
56.2 W
R3
340 W
R4
340 W
R2
56.2 W
J2
TP2
C14
0.1 Fm
C11
0.1 Fm
TP1
U1
11
2
12
4
Vocm
9
TP3
R6
348 W
1315
14 16
PwrPad
10
V
O-
V
O+
3
75
86
VCC
348 W
VCC
R5
PD
J5
GND
V
S+
J6
C3
10 Fm 10 Fm
C5
0.1 Fm 0.1 Fm
C12 C13
J8
J3
T1
16
5
4
R9
open
R7
86.6 W
R8
86.6 W
R10
open
XFMR_ADT1-1WT
3
R11
69.8W
J7
C8
open
C7
open
C1
open
C2
open
VCC
THS4511
www.ti.com
SLOS471E –SEPTEMBER 2005–REVISED NOVEMBER 2009
THS4511 EVM
Figure 55 is the THS4511 EVAL1 EVM schematic, layers 1 through 4 of the PCB are shown in Figure 56, and
Table 5 is the bill of materials for the EVM as supplied from TI.
Figure 55. THS4511 EVAL1 EVM Schematic
Figure 56. THS4511 EVAL1 EVM Layer 1 Through 4
Copyright © 2005–2009, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): THS4511