Datasheet

THS4511
V
IN
R =75
S
W
V
Signal
V
S-
V
CM
=2.5V
R
O
R
O
-
+
V =5V
S+
175 W
175 W
75 W
130 W
130 W
348 W
348 W
V
OD
VideoSource
CM
V
Signal
V
S-
R
F
R
F
R
G
R
G
R
IT
R
IT
R
PD
R
PD
R
O
R
O
V
OUT+
V
OUT-
THS4511
R
C
C
S
R
S
V =3.75Vto5V
S+
-0.4
-0.2
0
0.2
0.4
0.6
0.8
0 5 10 15 20
t-Time- sm
Voltage-V
-1
-0.5
0
0.5
1
1.5
0 5 10 15 20
t-Time- sm
V V
OD
-VideoBufferOutput-
THS4511
www.ti.com SLOS471E –SEPTEMBER 2005–REVISED NOVEMBER 2009
If the signal originates from an ac-coupled 50-Ω
source (see Figure 47), the equivalent dc-source
resistance is an open circuit and R
I
= R
G
+ R
IT
.
Table 4 is a modification of Table 1 to add the proper
values with R
PD
assuming V
S+
= 3.75 V, an
ac-coupled 50-Ω source impedance, and setting the
output common-mode voltage to midsupply.
Table 4. R
PD
Values for Various Gains,
V
S+
= 3.75 V, AC-Coupled Signal Source
GAIN R
F
R
G
R
IT
R
PD
0 dB 348 Ω 340 Ω 56.2 Ω 390 Ω
Figure 48. Single-Supply Video Buffer, Gain = 2
6 dB 348 Ω 169 Ω 64.9 Ω 80.6 Ω
Figure 47. THS4511 AC-Coupled Single-Source
Supply Range From 3.75 V to 5 V With R
PD
Used
To Set V
IC
Figure 49. Y' Signal with 3-Level Sync and Video
Video Buffer
Signal
Figure 48 shows a possible application of the
THS4508 as a dc-coupled video buffer with a gain of
2. Figure 49 shows a plot of the Y' signal originating
from an HDTV 720p video system. The input signal
includes a 3-level sync (minimum level at –0.3 V) and
the portion of a video signal with maximum amplitude
of 0.7 V. Although the buffer draws its power from a
5-V single-ended power supply, internal level shifters
allow the buffer to support input signals which are as
much as –0.3 V below ground. This allows maximum
design flexibility while maintaining a minimum parts
count. Figure 50 shows the differential output of the
buffer. Note that the dc-coupled amplifier can
introduce a dc offset on a signal applied at its input.
Figure 50. Video Buffer Differential Output Signal
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