Datasheet

49.9
+
J1
R12
C15
0.22 µF
R1
69.8
R3
100
R4
100
R2
69.8
J2
TP2
C14
0.1 µF
C11
0.1 µF
TP1
U1
11
2
12
4
Vocm
9
TP3
R6
348
1315
14 16
PwrPad
10
V
O−
V
O+
3
75
86
VCC
348
VCC
R5
PD
C9
0.1 µF
C10
0.1 µF
C4
10 µF 10 µF
C6
VEE
V
S−
J4 J5
GND
VEE
V
S+
J6
C3
10 µF 10 µF
C5
0.1 µF 0.1 µF
C12 C13
J8
J3
T1
16
5
4
R9
open
R7
86.6
R8
86.6
R10
open
XFMR_ADT1−1WT
3
R11
69.8
J7
C8
open
C7
open
C1
open
C2
open
VCC
VEE
THS4509
SLOS454H JANUARY 2005REVISED NOVEMBER 2009
www.ti.com
THS4509 EVM
Figure 94 is the THS4509 EVAL1 EVM schematic; layers 1 through 4 of the PCB are shown Figure 95, and
Table 4 is the bill of materials for the EVM as supplied from TI.
Figure 94. THS4509 EVAL1 EVM Schematic
Figure 95. THS4509 EVAL1 EVM Layer 1 through Layer 4
32 Submit Documentation Feedback Copyright © 2005–2009, Texas Instruments Incorporated
Product Folder Link(s): THS4509