Datasheet

V
S
R
S
R
g
R
f
R
f
+
-
R
T
-
+
R
iso
C
L
R
g
Riso = 10 - 25 Ω
V
S
-V
S
R
iso
Use of Isolation Resistors With a Capacitive Load.
_
+
4
5
3
7
2
6
V
OCM
-V
S
PwrPad
V
S
PD
1
8
R0805
R4
C4
C0805
R5
R0805
C3
C0805
R6
R7
R0805
R0805
C5
C6
C0805
C0805
C7
C0805
J2
J3
J2
J3
R2
R0805
R3
R0805
C1
C0805
C2
C0805
R1
R1206
J1
3
1
4
5
6
R11
R1206
R9
R0805
R8
R9
R0805
R0805
J2
J3
J4
T1
U1
THS450X
Simplified Schematic of the Evaluation Board. Power
Supply Decoupling, V
OCM,
and Power Down Circuitry
Not Shown
THS4502
THS4503
www.ti.com SLOS352E –APRIL 2002–REVISED OCTOBER 2011
dissipation, but also dynamic power dissipation. Often high frequency return currents, but often is not
times, this is difficult to quantify because the signal required.
pattern is inconsistent, but an estimate of the RMS
power dissipation can provide visibility into a possible
EVALUATION FIXTURES, SPICE MODELS,
problem.
AND APPLICTIONS SUPPORT
Texas Instruments is committed to providing its
DRIVING CAPACITIVE LOADS
customers with the highest quality of applications
High-speed amplifiers are typically not well-suited for support. To support this goal, an evaluation board
driving large capacitive loads. If necessary, however, has been developed for the THS4500 family of fully
the load capacitance should be isolated by two differential amplifiers. The evaluation board can be
isolation resistors in series with the output. The obtained by ordering through the Texas Instruments
requisite isolation resistor size depends on the value web site, www.ti.com, or through your local Texas
of the capacitance, but 10 to 25Ω is a good place to Instruments sales representative. Schematic for the
begin the optimization process. Larger isolation evaluation board is shown below with their default
resistors decrease the amount of peaking in the component values. Unpopulated footprints are shown
frequency response induced by the capacitive load, to provide insight into design flexibility.
but this comes at the expense of larger voltage drop
across the resistors, increasing the output swing
requirements of the system.
Figure 115.
POWER SUPPLY DECOUPLING
Figure 116.
TECHNIQUES AND RECOMMENDATIONS
Power supply decoupling is a critical aspect of any
Computer simulation of circuit performance using
high-performance amplifier design process. Careful
SPICE is often useful when analyzing the
decoupling provides higher quality ac performance
performance of analog circuits and systems. This is
(most notably improved distortion performance). The
particularly true for video and RF amplifier circuits
following guidelines ensure the highest level of
where parasitic capacitance and inductance can have
performance.
a major effect on circuit performance. A SPICE model
1. Place decoupling capacitors as close to the for the THS4500 family of devices is available
power supply inputs as possible, with the goal of through the Texas Instruments web site (www.ti.com).
minimizing the inductance of the path from The PIC is also available for design assistance and
ground to the power supply. detailed product information. These models do a
good job of predicting small-signal ac and transient
2. Placement priority should be as follows: smaller
performance under a wide variety of operating
capacitors should be closer to the device.
conditions. They are not intended to model the
3. Use of solid power and ground planes is
distortion characteristics of the amplifier, nor do they
recommended to reduce the inductance along
attempt to distinguish between the package types in
power supply return current paths.
their small-signal ac performance. Detailed
4. Recommended values for power supply
information about what is and is not modeled is
decoupling include 10-µF and 0.1-µF capacitors
contained in the model file itself.
for each supply. A 1000-pF capacitor can be
used across the supplies as well for extremely
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