Datasheet
β
1
+
R1
R1 ) R2
β
2
+
R3 ) R
T
|| R
S
R3 ) R
T
|| R
S
) R4
V
OD
V
S
+ 2
ǒ
1–β
2
β
1
) β
2
Ǔǒ
R
T
R
T
) R
S
Ǔ
V
OD
V
IN
+ 2
ǒ
1–β
2
β
1
) β
2
Ǔ
(7)
(8)
(9)
Gain
ǒ
V
OD
V
IN
Ǔ
V
OCM
V
n
V
S
R
S
R1
R
T
R2
R4
-
+
+
-
V
out+
V
out-
R3
V
P
R
T
+
1
1
R
S
–
1–
K
2(1)K)
R3
K +
R2
R1
R2 + R4
R3 + R1 *
ǒ
R
s
|| R
T
Ǔ
(6)
THS4502
THS4503
SLOS352E –APRIL 2002–REVISED OCTOBER 2011
www.ti.com
APPLICATION CIRCUITS USING FULLY
DIFFERENTIAL AMPLIFIERS
Fully differential amplifiers provide designers with a
great deal of flexibility in a wide variety of
applications. This section provides an overview of
some common circuit configurations and gives some
design guidelines. Designing the interface to an ADC,
driving lines differentially, and filtering with fully
differential amplifiers are a few of the circuits that are
covered.
For more detailed information about balance in fully
differential amplifiers, see Fully Differential Amplifiers,
BASIC DESIGN CONSIDERATIONS
referenced at the end of this data sheet.
The circuits in Figures 96 through 100 are used to
INTERFACING TO AN ANALOG-TO-DIGITAL
highlight basic design considerations for fully
CONVERTER
differential amplifier circuit designs.
The THS4500 family of amplifiers are designed
Table 4. Resistor Values for Balanced Operation
specifically to interface to today's
in Various Gain Configurations
highest-performance analog-to-digital converters.
This section highlights the key concerns when
interfacing to an ADC and provides example
R2 & R4 (Ω) R1 (Ω) R3 (Ω) R
T
(Ω)
ADC/fully differential amplifier interface circuits.
1 392 412 383 54.9
Key design concerns when interfacing to an
analog-to-digital converter:
1 499 523 487 53.6
• Terminate the input source properly. In
2 392 215 187 60.4
high-frequency receiver chains, the source
2 1.3k 665 634 52.3
feeding the fully differential amplifier requires a
5 1.3k 274 249 56.2
specific load impedance (e.g., 50Ω ).
5 3.32k 681 649 52.3
• Design a symmetric printed-circuit board layout.
10 1.3k 147 118 64.9
Even-order distortion products are heavily
10 6.81k 698 681 52.3
influenced by layout, and careful attention to a
symmetric layout will minimize these distortion
NOTE: Values in this table assume a 50 Ω source impedance.
products.
• Minimize inductance in power supply decoupling
traces and components. Poor power supply
decoupling can have a dramatic effect on circuit
performance. Since the outputs are differential,
differential currents exist in the power supply pins.
Thus, decoupling capacitors should be placed in a
manner that minimizes the impedance of the
current loop.
• Use separate analog and digital power supplies
and grounds. Noise (bounce) in the power
Figure 96.
supplies (created by digital switching currents) can
couple directly into the signal path, and power
supply noise can create higher distortion products
Equations for calculating fully differential amplifier
as well.
resistor values in order to obtain balanced operation
• Use care when filtering. While an RC low-pass
in the presence of a 50-Ω source impedance are
filter may be desirable on the output of the
given in equations 6 through 9.
amplifier to filter broadband noise, the excess
loading can negatively impact the amplifier
linearity. Filtering in the feedback path does not
have this effect.
• AC-coupling allows easier circuit design. If
dc-coupling is required, be aware of the excess
power dissipation that can occur due to
level-shifting the output through the output
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