THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 Wideband Operational Amplifier FEATURES APPLICATIONS • • • • • • • • • • Wide Bandwidth: 3 GHz High Slew Rate: 830 V/µs Low Voltage Noise: 2.4 nV/√Hz Single Supply: 5 V, 3 V Quiescent Current: 18 mA Active Filter ADC Driver Ultrasound Gamma Camera RF/Telecom DESCRIPTION The THS4304 is a wideband, voltage-feedback operational amplifier designed for use in high-speed analog signal-processing chains operating with a single 5-V power supply.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PINOUT DRAWING TOP VIEW DBV VOUT 1 VS− 2 IN+ 3 5 4 TOP VIEW VS+ D and DGK NC 1 8 NC IN− 2 7 VS+ IN+ 3 6 VOUT VS− 4 5 VOUT IN− NOTE: NC indicates there is no internal connection to these pins.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) UNIT VS Supply voltage VI Input voltage +6.
THS4304 www.ti.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 ELECTRICAL CHARACTERISTICS (continued) Specifications: VS = 5 V: RF = 249 Ω, RL = 100 Ω, and G = +2 unless otherwise noted PARAMETER CONDITIONS TYP OVER TEMPERATURE 25°C 25°C 0°C to 70°C –40°C to 85°C 1.1 to 3.9 1.2 to 3.8 1.3 to 3.7 1.3 to 3.7 1 to 4 1.1 to 3.9 1.2 to 3.8 1.2 to 3.
THS4304 www.ti.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 ELECTRICAL CHARACTERISTICS (continued) Specifications: VS = 3 V: RF = 249 Ω, RL = 499 Ω, and G = +2 unless otherwise noted TYP PARAMETER CONDITIONS OVER TEMPERATURE 25°C 25°C 0°C to 70°C –40°C to 85°C 1.1 to 1.9 1.2 to 1.8 1.3 to 1.7 1.3 to 1.7 1 to 2 1.1 to 1.9 1.2 to 1.8 1.2 to 1.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE 5V Frequency response 1–3, 5, 6 0.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 TYPICAL CHARACTERISTICS (5 V) FREQUENCY RESPONSE 8 3 7 2 VO = 200 mVPP 0 VO = 400 mVPP −1 −2 10 M 6 5 CF = 0.5 pF CF = 1 pF 3 100 M 1G 0 10 G 1M 10 M f − Frequency − Hz 0.1-dB FLATNESS Gain = 2, RF = 249 Ω, CF = 0.5 pF, RL = 100 Ω, VO = 100 mVPP, VS = 5 V 90 MHz 18 16 300 MHz 6 5.9 5.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 TYPICAL CHARACTERISTICS (5 V) (continued) 3RD HARMONIC DISTORTION vs FREQUENCY 2ND HARMONIC DISTORTION vs FREQUENCY −70 MSOP and SOT-23 RL = 100 Ω to 1 kΩ −80 −90 −100 −50 −60 SOT-23 RL = 100 Ω −70 MSOP RL = 100 Ω −80 −90 −100 10 M 1M 1M −70 −80 10 M f − Frequency − Hz MSOP and SOT-23 RL = 100 Ω to 1 kΩ −90 −100 −110 10 M 1M 100 M 100 M f − Frequency − Hz Figure 10. Figure 11. Figure 12.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 TYPICAL CHARACTERISTICS (5 V) (continued) NOISE FIGURE vs FREQUENCY QUIESCENT CURRENT vs SUPPLY VOLTAGE 14 12 10 8 6 Gain = 2, RF = 249 Ω, RG = 249 Ω, RL = 100 Ω, VS = 5 V 4 2 0 18 16 TA = 25°C 14 500 M TA = −40°C 12 10 8 6 40 30 10 0 2.5 3.5 4.5 3 4 VS − Supply Voltage − V 5 10 k 100 k 1M 10 M 100 M 1G f − Frequency − Hz Figure 19. Figure 20. Figure 21.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 TYPICAL CHARACTERISTICS (5 V) (continued) 3.5 2 Output 1.5 3.5 3 Gain = 2 RL = 100 Ω RF = 249 Ω VS = 5 V 2.5 2 1.5 Input 4 3.5 VO − Output Voltage − V VO − Output Voltage − V 2.5 3 Gain = 2 RL = 100 Ω RF = 249 Ω VS = 5 V 2.5 2 1.5 10 20 30 40 50 0 1 t − Time − ns 2 3 4 5 6 7 t − Time − ns Figure 28. Figure 29. Z o − Output Impedance − Ω 10 k Gain = 2, RF = 249 Ω, VS = 5 V 100 10 1 0.1 0.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 TYPICAL CHARACTERISTICS (3 V) FREQUENCY RESPONSE FREQUENCY RESPONSE 10 8 VO = 200 mVPP 6 5 VO = 400 mVPP 4 −3dB 900 MHz 7 CF = 0.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 TYPICAL CHARACTERISTICS (3 V) (continued) INPUT BIAS AND OFFSET CURRENT vs CASE TEMPERATURE OUTPUT VOLTAGE vs LOAD RESISTANCE 9 I IB − Input Bias Current − µ A 1.75 1.5 1.25 1 100 IIB− 1000 580 5 560 IIB+ 4 540 IOS 3 500 1 480 460 −20 0 3 1 VO − Output Voltage − V Output 0.5 2.5 2 1.5 Gain = 2, RF = 249 Ω, RL = 499 Ω, VS = 3 V 30 40 1.25 −40 −20 0 50 60 2 1.75 1.5 2 1.75 1.5 Input 1.25 1 Output 0.75 0.75 0.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 APPLICATION INFORMATION For many years, high-performance analog design has required the generation of split power supply voltages, like ±15 V, ±8 V, and more recently ±5 V, in order to realize the full performance of the amplifiers available. Modern trends in high-performance analog are moving towards single-supply operation at 5 V, 3 V, and lower.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 APPLICATION INFORMATION (continued) SOT-23 versus MSOP With light loading of 500-Ω and higher resistance, the THS4304 shows HD2 that is not dependant of package. With heavy output loading of 100 Ω, the THS4304 in SOT-23 package shows about 6 dB better HD2 performance versus the MSOP package. EVALUATION MODULES The THS4304 has two evaluation modules (EVMs) available. One is for the MSOP (DGK) package and the other for the SOT-23 (DBV) package.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 APPLICATION INFORMATION (continued) EVM BILL OF MATERIALS THS4304 EVM (1) Item 1 Description SMD Size Reference Designator PCB Quantity Manufacturer's Part Number Distributor's Part Number FB1, FB2 2 (STEWARD) HI1206N800R-00 (DIGI-KEY) 240-1010-1-ND Bead, ferrite, 3-A, 80-Ω 1206 2 Capacitor, 3.3-µF, Ceramic 1206 C1, C2 2 (AVX) 1206YG335ZAT2A (GARRETT) 1206YG335ZAT2A 3 Capacitor, 0.
THS4304 SLOS436A – MARCH 2004 – REVISED JULY 2004 18 www.ti.com Figure 48. THS4304DGK EVM Layout Top and L2 Figure 49. THS4304DGK EVM Layout Bottom and L3 Figure 50. THS4304DBV EVM Layout Top and L2 Figure 51.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 NON-INVERTING GAIN WITH SPLIT SUPPLY The following schematic shows how to configure the operational amplifier for non-inverting gain with split power supply (± 2.5V). This is how the EVM is supplied from TI. This configuration is convenient for test purposes because most signal generators and analyzer are designed to use ground-referenced signals by default. Note the input and output provides 50-Ω termination. −VS −VS C5 0.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 INVERTING GAIN WITH SPLIT POWER SUPPLY The following schematic shows how to configure the operational amplifier for inverting gain of 1 (–1 V/V) with split power supply (±2.5 V). Note the input and output provides 50-Ω termination for convenient interface to common test equipment. −VS −VS C5 0.1 F R7 GND J3 J4 C7 R9 0 221 J6 C1 3.3 F GND TP1 +VS 44 3 R1 124 − + 5 22 11 THS4304DBV R2 C9 49.
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 NON-INVERTING SINGLE-SUPPLY OPERATION The THS4304 EVM can easily be configured for single 5-V supply operation, as shown in the following schematic, with no change in performance. This circuit passes dc signals at the input, so care must be taken to reference (or bias) the input signal to mid-supply. If dc operation is not required, the amplifier can be ac coupled by inserting a capacitor in series with the input (C7) and output (C9).
THS4304 www.ti.com SLOS436A – MARCH 2004 – REVISED JULY 2004 The differential topology employed in this circuit provides for significant suppression of the 2nd-order harmonic distortion of the amplifiers. This, along with the superior 3rd-order harmonic distortion performance of the amplifiers, results in the SFDR performance of the circuit (at frequencies up to 40 MHz) being set by higher-order harmonics generated by the sampling process of the ADS5500.
PACKAGE OPTION ADDENDUM www.ti.
PACKAGE OPTION ADDENDUM www.ti.com (3) 11-Apr-2013 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) THS4304DBVR SOT-23 DBV 5 3000 180.0 9.0 THS4304DBVT SOT-23 DBV 5 250 180.0 9.0 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.15 3.2 1.4 4.0 8.0 Q3 3.15 3.2 1.4 4.0 8.
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) THS4304DBVR SOT-23 DBV 5 3000 182.0 182.0 20.0 THS4304DBVT SOT-23 DBV 5 250 182.0 182.0 20.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.