Datasheet

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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATING TABLE
THS4140
THS4141
SLOS320F – MAY 2000 – REVISED JANUARY 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Table 1. AVAILABLE OPTIONS
PACKAGED DEVICES
(1)
EVALUATION
T
A
MSOP PowerPAD™ MSOP
SMALL OUTLINE
MODULES
(D)
(DGN) SYMBOL (DGK) SYMBOL
THS4140CD THS4140CDGN AOF THS4140CDGK ATR THS4140EVM
0°C to 70°C
THS4141CD THS4141CDGN AOI THS4141CDGK ATS THS4141EVM
THS4140ID THS4140IDGN AOG THS4140IDGK ASQ –
–40°C to 85°C
THS4141ID THS4141IDGN AOK THS4141IDGK ASR –
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com .
over operating free-air temperature range (unless otherwise noted)
(1)
UNIT
V
CC
Supply voltage V
CC–
to V
CC+
±16.5 V
V
I
Input voltage ±V
CC
I
O
Output current
(2)
150 mA
V
ID
Differential input voltage ±6 V
Continuous total power dissipation See Dissipation Rating Table
Maximum junction temperature
(3)
150°C
T
J
Maximum junction temperature, continuous operation, long term reliability
(4)
125°C
C suffix 0°C to 70°C
T
A
Operating free-air temperature
I suffix –40°C to 85°C
T
stg
Storage temperature –65°C to 150°C
Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds 300°C
HBM 2500 V
ESD ratings CDM 1500 V
MM 200 V
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The THS414x may incorporate a PowerPad™ on the underside of the chip. This acts as a heatsink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature
which could permanently damage the device. See TI technical brief SLMA002 and SLMA004 for more information about utilizing the
PowerPad™ thermally enhanced package.
(3) The absolute maximum temperature under any condition is limited by the constraints of the silicon process.
(4) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
POWER RATING
(2)
PACKAGE θ
JA
(1)
(°C/W) θ
JC
(°C/W)
T
A
= 25°C T
A
= 85°C
D 97.5 38.3 1.02 W 410 mW
DGN 58.4 4.7 1.71 W 685 mW
DGK 260 54.2 385 mW 154 mW
(1) This data was taken using the JEDEC standard High-K test PCB.
(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase.
Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long
term reliability.
2
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