Datasheet

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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATING TABLE
THS4120
THS4121
SLOS319D – FEBRUARY 2001 – REVISED OCTOBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICES
EVALUATION
T
A
MSOP PowerPAD™ MSOP
MODULES
SMALL OUTLINE(D)
(DGN) SYMBOL (DGK) SYMBOL
THS4120CD THS4120CDGN ARL THS4120CDGK ATZ THS4120EVM
0 ° C to 70 ° C
THS4121CD THS4121CDGN ASB THS4121CDGK ATO THS4121EVM
THS4120ID THS4120IDGN ARM THS4120IDGK ARN –
–40 ° C to 85 ° C
THS4121ID THS4121IDGN ASC THS4121IDGK ASN –
over operating free-air temperature range (unless otherwise noted)
(1)
UNIT
Supply voltage, GND to V
DD
3.6 V
V
I
Input voltage ± V
DD
I
O
Output current (sink)
(2)
110 mA
V
ID
Differential input voltage ± V
DD
Continuous total power dissipation See Dissipation Rating Table
T
J
Maximum junction temperature
(3)
150 ° C
T
J
Maximum junction temperature, continuous operation, long-term reliability
(4)
125 ° C
C suffix 0 ° C to 70 ° C
T
A
Operating free-air temperature
I suffix –40 ° C to 85 ° C
T
stg
Storage Temperature –65 ° C to 150 ° C
Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds 300 ° C
HBM 4000 V
ESD ratings CDM 1500 V
MM 200 V
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The THS412x may incorporate a PowerPad™ on the underside of the chip. This acts as a heatsink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature
which could permanently damage the device. See TI technical brief SLMA002 and SLMA004 for more information about utilizing the
PowerPad™ thermally enhanced package.
(3) The absolute maximum temperature under any condition is limited by the constraints of the silicon process.
(4) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
POWER RATING
(2)
PACKAGE θ
JA
(1)
( ° C/W) θ
JC
( ° C/W)
T
A
= 25 ° C T
A
= 85 ° C
D 97.5 38.3 1.02 W 410 mW
DGN 58.4 4.7 1.71 W 685 mW
DGK 260 54.2 385 mW 154 mW
(1) This data was taken using the JEDEC standard High-K test PCB.
(2) Power rating is determined with a junction temperature of 125 ° C. This is the point where distortion
starts to substantially increase. Thermal management of the final PCB should strive to keep the
junction temperature at or below 125 ° C for best performance and long-term reliability.
2
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