Datasheet

www.ti.com
Offset Voltage
+
–
V
IO
R
G
R
S
R
F
I
IB–
V
OS
I
IB+
+
–
S0280-01
( )
R
F
V V I R 1 I R
OS IO IB S IB F
R
G
æ ö
= ± ± ´ + ± ´
ç ÷
+ -
ç ÷
è ø
General Configurations
V
I
V
O
C1
+
–
R
G
R
F
R1
S0281-01
3dB
1
f
2 R1C1
-
=
p
O
F
I G
V
R
1
1
V R 1 sR1C1
æ ö
æ ö
= +
ç ÷
ç ÷
ç ÷
+
è ø
è ø
THS4021
THS4022
SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007
The output offset voltage (V
OO
) is the sum of the input offset voltage (V
IO
) and both input bias currents (I
IB
) times
the corresponding gains. The schematic and formula of Figure 35 can be used to calculate the output offset
voltage.
Figure 35. Output Offset Voltage Model
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required.
The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see
Figure 36 ).
Figure 36. Single-Pole Low-Pass Filter
Copyright © 1999 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): THS4021 THS4022