Datasheet

THS3122
THS3125
SLOS382D –SEPTEMBER 2001–REVISED FEBRUARY 2011 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS
(1)
PACKAGED DEVICE
EVALUATION
T
A
SOIC-8 SOIC-8 PowerPAD SOIC-14 TSSOP-14
MODULES
(D) (DDA) (D) (PWP)
0°C to +70°C THS3122CD THS3122CDDA THS3125CD THS3125CPWP
THS3122EVM
THS3125EVM
40°C to +85°C THS3122ID THS3122IDDA THS3125ID THS3125IPWP
(1) For the most current specification and package information, refer to the Package Option Addendum located at the end of this data sheet
or see the TI web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
Over operating free-air temperature (unless otherwise noted).
UNIT
Supply voltage, V
CC+
to V
CC–
33 V
Input voltage ±V
CC
Output current (see
(2)
) 550 mA
Differential input voltage ±4 V
Maximum junction temperature +150°C
Total power dissipation at (or below) +25°C free-air temperature See Dissipation Ratings Table
Commercial 0°C to +70°C
Operating free-air temperature, T
A
Industrial –40°C to +85°C
Commercial –65°C to +125°C
Storage temperature, T
stg
Industrial –65°C to +125°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The THS3122 and THS3125 may incorporate a PowerPAD™ on the underside of the chip. This pad acts as a heatsink and must be
connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction
temperature which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the
PowerPAD™ thermally-enhanced package.
DISSIPATION RATING TABLE
T
A
= +25°C
PACKAGE θ
JA
POWER RATING
D-8 95°C/W
(1)
1.32 W
DDA 67°C/W 1.87 W
D-14 66.6°C/W
(1)
1.88 W
PWP 37.5°C/W 3.3 W
(1) These data were taken using the JEDEC proposed high-K test PCB.
For the JEDEC low-K test PCB, the θ
JA
is 168°C/W for the D-8
package and 122.3°C/W for the D-14 package.
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Product Folder Link(s): THS3122 THS3125