Datasheet

-40 -20 0 20 40 60 80 100
T Free-AirTemperature( C)-
A
°
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
P MaximumPowerDissipation(W)
DMax
-
T =+125
J
C°
q =158 /W
JA
C°
q =95 /W
JA
C°
q =58.4 /W
JA
C°
THS3122
THS3125
SLOS382D –SEPTEMBER 2001–REVISED FEBRUARY 2011 www.ti.com
For systems where heat dissipation is more critical,
the THS3125 and THS3122 are also available in an
8-pin MSOP with PowerPAD package that offers
even better thermal performance. The thermal
coefficient for the PowerPAD packages are
substantially improved over the traditional SOIC.
Maximum power dissipation levels are depicted in
Figure 50 for the available packages. The data for the
PowerPAD packages assume a board layout that
follows the PowerPAD layout guidelines discussed
above and detailed in the PowerPAD application note
(literature number SLMA002). Figure 50 also
illustrates the effect of not soldering the PowerPAD to
a PCB. The thermal impedance increases
substantially, which may cause serious heat and
performance issues. Always solder the PowerPAD to
Results shown are with no air flow and PCB size of 3 in × 3 in
the PCB for optimum performance.
(76,2 mm × 76,2 mm).
When determining whether or not the device satisfies
• θ
JA
= 58.4°C/W for 8-pin MSOP with PowerPAD (DGN
the maximum power dissipation requirement, it is
package)
important to not only consider quiescent power
• θ
JA
= 95°C/W for 8-pin SOIC High-K test PCB (D package)
dissipation, but also dynamic power dissipation. Often
• θ
JA
= 158°C/W for 8-pin MSOP with PowerPAD without solder
times, this type of dissipation is difficult to quantify
Figure 50. Maximum Power Dissipation vs
because the signal pattern is inconsistent, but an
Ambient Temperature
estimate of the RMS power dissipation can provide
visibility into a possible problem.
18 Submit Documentation Feedback © 2001–2011, Texas Instruments Incorporated
Product Folder Link(s): THS3122 THS3125