Datasheet

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_
+
V
S
−V
S
715
5.11
178
V
S
_
+
V
S
−V
S
715
5.11
178
24.9
24.9
1 nF
0
500
1000
1500
2000
2500
100 k 1 M 10 M 100 M 1 G
+
1.21 k 1.21 k
50
V
O
f − Frequency − Hz
− Powerdown Output Impedance −
Z
OPD
V
S
= ±15 V and ±5 V
_
+
V
S
−V
S
_
+
V
S
−V
S
−V
S
V
S
604
604
133
5.11
5.11
SAVING POWER WITH POWER-DOWN
THS3092
THS3096
SLOS428B DECEMBER 2003 REVISED FEBRUARY 2006
rails and are given in the specification tables. Above
the Enable Threshold Voltage, the device is on.
Below the Disable Threshold Voltage, the device is
off. Behavior in between these threshold voltages is
not specified.
Note that this power-down functionality is just that;
the amplifier consumes less power in power-down
mode. The power-down mode is not intended to
provide a high-impedance output. In other words, the
power-down functionality is not intended to allow use
as a 3-state bus driver. When in power-down mode,
the impedance looking back into the output of the
amplifier is dominated by the feedback and gain
setting resistors, but the output impedance of the
device itself varies depending on the voltage applied
to the outputs.
Figure 63.
Figure 65 shows the total system output impedance
Figure 64 shows a push-pull FET driver circuit typical
which includes the amplifier output impedance in
of ultrasound applications with isolation resistors to
parallel with the feedback plus gain resistors, which
isolate the gate capacitance from the amplifier.
cumulate to 2420 . Figure 52 shows this circuit
configuration for reference.
Figure 65. Power-down Output Impedance vs
Frequency
Figure 64. PowerFET Drive Circuit
As with most current feedback amplifiers, the internal
architecture places some limitations on the system
when in power-down mode. Most notably is the fact
FUNCTIONALITY AND SETTING
that the amplifier actually turns ON if there is a ±0.7 V
THRESHOLD LEVELS WITH THE
or greater difference between the two input nodes
REFERENCE PIN
(V+ and V–) of the amplifier. If this difference
exceeds ±0.7 V, the output of the amplifier creates an
The THS3096 features a power-down pin ( PD) which
output voltage equal to approximately
lowers the quiescent current from 9.5 mA down to
[(V+ V–) 0.7 V] × Gain. This also implies that if a
500 µA, ideal for reducing system power.
voltage is applied to the output while in power-down
mode, the V- node voltage is equal to
The power-down pin of the amplifier defaults to the
V
O(applied)
× R
G
/(R
F
+ R
G
). For low gain configurations
positive supply voltage in the absence of an applied
and a large applied voltage at the output, the
voltage, putting the amplifier in the power-on mode of
amplifier may actually turn ON due to the
operation. To turn off the amplifier in an effort to
aforementioned behavior.
conserve power, the power-down pin can be driven
towards the negative rail. The threshold voltages for
The time delays associated with turning the device on
power-on and power-down are relative to the supply
20
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