Datasheet

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+
−
THS3092
20 V
−
+
1:1
THS3092
330 pF
330 pF
22 pF
22 pF
10 V
10 V
0.022 F
200 
100 
14.5 dBm
Line Power
200 
604 
4.99 k
4.99 k
0.01 F
191 
604 
1.21 k
0.022 F
24.9 
6.8 F
0.01 F
24.9 
*Hybrid Connection Not
Shown For Simplicity
DAC
V
IN+
DAC
V
IN−
1.21 k
Video Distribution
+
−
THS3092
26 V
−
+
1:1
THS3092
To RX
Hybrid
330 pF
330 pF
22 pF
13 V
13 V
0.01 F 6.8 F
4.99 k
200 
DAC
V
IN+
22 pF
133 
604 
604 
0.015 F
200 
4.99 k
49.9 
49.9 
0.022 F
0.022 F
14.5 dBm
Line Power
100 
DAC
V
IN−
+
−
75 Ω
75 Ω
75 Ω
75 Ω
75 Ω
n Lines
V
O(1)
V
O(n)
75-Ω Transmission Line
V
I
909 Ω 909 Ω
−15 V
15 V
Driving Capacitive Loads
THS3092
THS3096
SLOS428B – DECEMBER 2003 – REVISED FEBRUARY 2006
common-mode images, it only removes the
differential signal images. However, two separate
filter capacitors filter both the common-mode signals
and the differential-mode signals. Be sure to place
the ground connection point of the capacitors next to
each other, and then tie a single ground point at the
middle of this trace.
Figure 56.
The wide bandwidth, high slew rate, and high output
drive current of the THS3092/6 matches the demands
for video distribution for delivering video signals down
Figure 55.
multiple cables. To ensure high signal quality with
minimal degradation of performance, a 0.1-dB gain
flatness should be at least 7x the passband
Additionally, level shifting must be done to center the
frequency to minimize group delay variations from the
common-mode voltage appearing at the amplifier’s
amplifier. A high slew rate minimizes distortion of the
noninverting input to optimally the midpoint of the
video signal, and supports component video and
power supply. As a side benefit of the
RGB video signals that require fast transition times
ac-coupling/level shifter, a simple high pass filter is
and fast settling times for high signal quality.
formed. This is generally a good idea for VDSL
systems where the transmit band is typically above 1
MHz, but can be as low as 25 kHz.
One of the concerns about any DSL line driver is the
power dissipation. One of the most common ways to
reduce power is by using active termination, aka
synthesized impedance. Refer to TI Application Note
SLOA100 for more information on active termination.
The drawback to active termination is the received
signal is reduced by the same synthesis factor
utilized in the system. Due to the very high
attenuation of the line at up to 12 MHz, the receive
signal can be severely diminished. Thus, the use of
active termination should be kept to modest levels at
Figure 57. Video Distribution Amplifier
best. Figure 56 shows an example of utilizing a
Application
simple active termination scheme with a synthesis
factor of 2 to achieve the same line power, but with a
reduced power supply voltage that ultimately saves
power in the system.
Applications such as FET line drivers can be highly
capacitive and cause stability problems for
high-speed amplifiers.
Figure 58 through Figure 63 show recommended
methods for driving capacitive loads. The basic idea
is to use a resistor or ferrite chip to isolate the phase
shift at high frequency caused by the capacitive load
from the amplifier’s feedback path. See Figure 58 for
recommended resistor values versus capacitive load.
18
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