Datasheet

VS+
+
+
J4
VS−
3
8
2
4
6
7
1
FB1
VS−
C3
6.8 µF
C4
0.1 µF
J5
GND
TP1 TP2
FB2
J6
VS+
C6
6.8 µF
VS+
C7
0.1 µF
REF
PIN8
(2)
C9
JP1
(2)
C10
(2)
R9
(2)
JP2
(2)
(2) THS3095 EVM Only
J1
R1
0 Ω
R3
249 Ω
R4
1 kΩ
VS−
REF
PIN8
5
R5
Open
R7
49.9 Ω
R8
Open
R6
Open
J2
R2
49.9 Ω
J3
THS3091DDA or THS3095DDA
THS3091
THS3095
www.ti.com ........................................................................................................................................ SLOS423G – SEPTEMBER 2003 – REVISED OCTOBER 2008
where parasitic capacitance and inductance can have
a major effect on circuit performance. A SPICE model
for the THS3091/5 is available through the Texas
Instruments Web site (www.ti.com ). The Product
Information Center (PIC) is also available for design
assistance and detailed product information. These
models do a good job of predicting small-signal ac
and transient performance under a wide variety of
operating conditions. They are not intended to model
the distortion characteristics of the amplifier, nor do
they attempt to distinguish between the package
types in their small-signal ac performance. Detailed
information about what is and is not modeled is
contained in the model file itself.
Figure 75. THS3091 EVM Board Layout
(Top Layer)
Figure 74. THS3091 EVM Circuit Configuration
Figure 76. THS3091 EVM Board Layout
(Second and Third Layers)
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): THS3091 THS3095