Datasheet

THS3061
THS3062
www.ti.com SLOS394B –JULY 2002–REVISED NOVEMBER 2009
• Minimize parasitic capacitance to any ac ground • Connections to other wideband devices on the
for all signal I/O pins. Parasitic capacitance on the board may be made with short direct traces or
output and input pins can cause instability. To through onboard transmission lines. For short
reduce unwanted capacitance, a window around connections, consider the trace and the input to
the signal I/O pins should be opened in all of the the next device as a lumped capacitive load.
ground and power planes around those pins. Relatively wide traces (50 mils to 100 mils) should
Ground and power planes should be unbroken be used, preferably with ground and power planes
elsewhere on the board. opened up around them. Estimate the total
capacitive load and determine if isolation resistors
• Minimize the distance (< 0.25”) from the power
on the outputs are necessary. Low parasitic
supply pins to high frequency 0.1-μF decoupling
capacitive loads (< 4 pF) may not need an R
S
capacitors. At the device pins, the ground and
since the THS306x family is nominally
power plane layout should not be in close
compensated to operate with a 2-pF parasitic
proximity to the signal I/O pins. Avoid narrow
load. Higher parasitic capacitive loads without an
power and ground traces to minimize inductance
R
S
are allowed as the signal gain increases
between the pins and the decoupling capacitors.
(increasing the unloaded phase margin). If a long
The power supply connections should always be
trace is required, and the 6-dB signal loss intrinsic
decoupled with these capacitors. Larger (6.8 μF or
to a doubly-terminated transmission line is
more) tantalum decoupling capacitors, effective at
acceptable, implement a matched-impedance
lower frequencies, should also be used on the
transmission line using microstrip or stripline
main supply pins. These may be placed
techniques (consult an ECL design handbook for
somewhat farther from the device and may be
microstrip and stripline layout techniques).
shared among several devices in the same area
of the printed circuit board (PCB). The primary A 50-Ω environment is not necessary onboard,
goal is to minimize the impedance in the and in fact, a higher-impedance environment
differential-current return paths. For driving improves distortion as shown in the
differential loads with the THS3062, adding a distortion-versus-load plots. With a characteristic
capacitor between the power-supply pins board-trace impedance based on board material
improves 2nd-order harmonic-distortion and trace dimensions, a matching series resistor
performance. This also minimizes the current loop is used in the trace from the output of the
formed by the differential drive. THS306x, as well as a terminating shunt resistor
at the input of the destination device.
• Careful selection and placement of external
components preserve the high frequency Remember also that the terminating impedance is
performance of the THS306x family. Resistors the parallel combination of the shunt resistor and
should be a very low reactance type. the input impedance of the destination device: this
Surface-mount resistors work best and allow a total effective impedance should be set to match
tighter overall layout. Again, keep leads and PCB the trace impedance. If the 6-dB attenuation of a
trace lengths as short as possible. Never use doubly-terminated transmission line is
wirebound-type resistors in a high-frequency unacceptable, a long trace can be
application. Since the output pin and inverting series-terminated at the source end only. Treat
input pins are the most sensitive to parasitic the trace as a capacitive load in this case. This
capacitance, always position the feedback and does not preserve signal integrity as well as a
series-output resistors, if any, as close as possible doubly-terminated line. If the input impedance of
to the inverting-input pins and output pins. Other the destination device is low, there is some signal
network components, such as input-termination attenuation due to the voltage divider formed by
resistors, should be placed close to the the series output into the terminating impedance.
gain-setting resistors. Even with a low parasitic
• Socketing a high speed part like the THS306x
capacitance shunting the external resistors,
family is not recommended. The additional lead
excessively high resistor values can create
length and pin-to-pin capacitance introduced by
significant time constants that can degrade
the socket can create an extremely troublesome
performance. Good axial metal-film or
parasitic network that can make it almost
surface-mount resistors have approximately 0.2
impossible to achieve a smooth, stable frequency
pF in shunt with the resistor. For resistor values >
response. Best results are obtained by soldering
2.0 kΩ, this parasitic capacitance can add a pole
the THS306x family parts directly onto the board.
and/or a zero that can affect circuit operation.
Keep resistor values as low as possible,
PowerPAD DESIGN CONSIDERATIONS
consistent with load-driving considerations.
The THS306x family is available in a
thermally-enhanced PowerPAD family of packages.
These packages are constructed using a downset
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