Datasheet

THS1206
SLAS217H – MAY 1999 – REVISED JULY 2003#
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34
INTERFACING THE THS1206 TO THE TMS320C6201 DSP
The following application circuit shows an interface of the THS1206 to the TMS320C6201. The read (using RD,
RD
-controlled) and write timings (using WR, WR-controlled) shown before are valid for this specific interface.
CS0
CS1
RD
WR
DATA_AV
DATA
CONV_CLK
THS1206–1
CS0
CS1
RD
WR
DATA_AV
DATA
CONV_CLK
THS1206–2
TMS320C6201
CE1
EA20
ARE
AWE
EXT_INT6
DATA
TOUT1
TOUT2
EA21
EXT_INT7
ANALOG INPUT CONFIGURATION AND REFERENCE VOLTAGE
The THS1206 features four analog input channels. These can be configured for either single-ended or differential
operation. Best performance is achieved in differential mode. Figure 40 shows a simplified model, where a single-ended
configuration for channel AINP is selected. The reference voltages for the ADC itself are V
REFP
and V
REFM
(either internal
or external reference voltage). The analog input voltage range goes from V
REFM
to V
REFP
. This means that V
REFM
defines
the minimum voltage, which can be applied to the ADC. V
REFP
defines the maximum voltage, which can be applied to the
ADC. The internal reference source provides the voltage V
REFM
of 1.5 V and the voltage V
REFP
of 3.5 V. The resulting
analog input voltage swing of 2 V can be expressed by:
V
REFM
AINP V
REFP
12-Bit
ADC
V
REFP
V
REFM
AINP
Figure 40. Single-Ended Input Stage
(1)