Datasheet

TFP410-EP
PanelBus™ DIGITAL TRANSMITTER
SGLS344A − JULY 2006 − REVISED MAY 2011
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
S Slave Address W A Sub-Address A Data A Data A P
Where:
From Master A Acknowledge
From Slave S Start condition
P Stop Condition
Figure 12. I
2
C Write Cycle
S Slave Address W A Sub-Address A Sr Slave Address R A Data A Data /A P
Where:
From Master A Acknowledge
From Slave S Start condition
/A Not acknowledge (SDA high) P Stop Condition
R Read Condition = 1 Sr Restart Condition
W Write Condition = 0
Figure 13. I
2
C Read Cycle
PowerPADt 64-pin TQFP package
The TFP410 is available in TI’s thermally-enhanced 64-pin TQFP PowerPAD package. The PowerPAD package
is a 10-mm × 10-mm × 1-mm TQFP outline with 0,5-mm lead pitch. The PowerPAD package has a specially
designed die-mount pad that offers improved thermal capability over typical TQFP packages of the same
outline. The PowerPAD package also offers a backside solder plane that connects directly to the die-mount pad
for enhanced thermal conduction. For thermal considerations, soldering the back side of the TFP410 to the
application board is not required, as the device power dissipation is well within the package capability when not
soldered. If traces or vias are located under the back-side pad, they should be protected by suitable solder mask
or other assembly technique to prevent inadvertent shorting to the exposed back-side pad.
Soldering the back side of the device to a thermal land connected to the PCB ground plane is recommended
for electrical and EMI considerations. The thermal land may be soldered to the exposed PowerPAD package
using standard reflow soldering techniques.
The recommended pad size for the grounded thermal land is 5,9 mm minimum, centered in the device land
pattern. When vias are required to ground the land, multiple vias are recommended for a low-impedance
connection to the ground plane. Vias in the exposed pad should be small enough or filled to prevent wicking
the solder away from the interface between the package body and the thermal land on the surface of the board
during solder reflow.