Information

QE[23:0], QO[23:0],
ODCK, DE, CTL[3:1],
HSYNC, VSYNC, SCDT
PD
t
pd(PDL)
V
IL
QE[23:0], QO[23:0],
ODCK, DE, CTL[3:2],
HSYNC, VSYNC
PDO
t
pd(PDOL)
V
IL
50%
V
OH
t
d(st)
ODCK
QE[23:0]
t
ps
50%
Rx+
Rx–
QE[23:0], QO[23:0] DE,
CTL[3:1], HSYNC, VSYNC
V
OH
V
OL
V
OH
V
OL
V
OH
V
OL
V
OH
V
OL
t
(su1)
t
(h1)
t
(h2)
t
(su2)
V
OH
V
OH
V
OL
V
OL
ODCK
OCK_INV
80%
20%
80%
20%
t
r2
t
f2
ODCK
1/f
ODCK
ODCK
QE[23:0], QO[23:0], DE,
CTK[3:1], HSYNC, VSYNC
20%
80% 80%
20%
t
r1
t
f1
TFP401
TFP401A
www.ti.com SLDS120E –MARCH 2000–REVISED JULY 2013
PARAMETER MEASUREMENT INFORMATION
Figure 1. Rise and Fall Times of Data and Control Signals
N
N
Figure 2. Rise and Fall Times of ODCK Figure 3. ODCK Frequency
N N
N N
Figure 4. Data Setup and Hold Times to Rising and Falling Edges of ODCK
N
N
Figure 5. ODCK High to QE[23:0] Figure 6. Analog Input Intra-Pair
Staggered Data Output Differential Skew
N N
N N
Figure 7. Delay From PD Low to Hi-Z Outputs Figure 8. Delay From PDO Low to Hi-Z Outputs
N N
N N
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