Datasheet

0 1 0
0
A1A2
A0
Slave Address
R/W
Fixed
Hardware
Selectable
0 0 0 0 B1 B000
TCA9554
SCPS233A –NOVEMBER 2011–REVISED MARCH 2012 www.ti.com
Device Address
Figure 6 shows the address byte for the TCA9554.
Figure 6. TCA9554 Address
Table 3. Address Reference
INPUTS
I
2
C BUS SLAVE ADDRESS
A2 A1 A0
L L L 32 (decimal), 20 (hexadecimal)
L L H 33 (decimal), 21 (hexadecimal)
L H L 34 (decimal), 22 (hexadecimal)
L H H 35 (decimal), 23 (hexadecimal)
H L L 36 (decimal), 24 (hexadecimal)
H L H 37 (decimal), 25 (hexadecimal)
H H L 38 (decimal), 26 (hexadecimal)
H H H 39 (decimal), 27 (hexadecimal)
The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read
is selected. A low (0) selects a write operation.
Control Register and Command Byte
Following the successful acknowledgment of the address byte, the bus master sends a command byte that is
stored in the control register in the TCA9554. Two bits of this command byte state the operation (read or write)
and the internal register (input, output, polarity inversion or configuration) that will be affected. This register can
be written or read through the I
2
C bus. The command byte is sent only during a write transmission.
Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a
new command byte has been sent.
Figure 7. Control Register Bits
Table 4. Command Byte
CONTROL REGISTER BITS
COMMAND BYTE POWER-UP
REGISTER PROTOCOL
(HEX) DEFAULT
B1 B0
0 0 0x00 Input Port Read byte XXXX XXXX
0 1 0x01 Output Port Read/write byte 1111 1111
1 0 0x02 Polarity Inversion Read/write byte 0000 0000
1 1 0x03 Configuration Read/write byte 1111 1111
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