Datasheet

COL COL COL COL COL COL COL COL COL COL
ROW
X7 X7X7X7 X7 X7 X7 X7 X7 X7
ROW
X3 X3X3X3 X3 X3 X3 X3 X3 X3
ROW
X6 X6X6X6 X6 X6 X6 X6 X6 X6
ROW
X2 X2
X2
X2 X2 X2 X2 X2 X2 X2
ROW
X5 X5X5X5 X5 X5 X5 X5 X5 X5
ROW
X1 X1X1X1 X1 X1 X1 X1 X1 X1
ROW
X4 X4X4X4 X4 X4 X4 X4 X4 X4
ROW
X0 X0X0X0
X0
X0 X0 X0 X0 X0
TCA8418
SCPS215B SEPTEMBER 2009REVISED MARCH 2010
www.ti.com
Figure 8. Typical Application
Table 6. Key Value Assignment
C0 C1 C2 C3 C4 C5 C6 C7 C8 C9
R0 1 2 3 4 5 6 7 8 9 10
R1 11 12 13 14 15 16 17 18 19 20
R2 21 22 23 24 25 26 27 28 29 30
R3 31 32 33 34 35 36 37 38 39 40
R4 41 42 43 44 45 46 47 48 49 50
R5 51 52 53 54 55 56 57 58 59 60
R6 61 62 63 64 65 66 67 68 69 70
R7 71 72 73 74 75 76 77 78 79 80
The 18 GPIOs can be configured to support up to 80 keys. The GPIOs are programmed into rows (maximum of
8) and columns (maximum of 10) to support a keypad. This is done through writing to “Keypad or GPIO
Selection” registers (0x1D 0x1F). The keypad in idle mode will be configured as Columns being driven low and
Rows as inputs with pull-ups.
When there is a key press or multiple key presses (Short between Column and Row), it will trigger an internal
state machine interrupt. The row that has a pressed key can be determined through reading the “GPIO Data
Status” registers (0x14-0x16).After that, the state machine starts a keyscan cycle to determine the column of the
key that was pressed. The state machine sets one column as an output low and all other columns as high. The
state machine will then walk a zero across the applicable row to determine what keys are being pressed.
Once a key has been pressed for 25 ms, the state machine will set the appropriate key/s in the Key Event Status
register with the key-pressed bit set (bit 7). If the K_IEN is set it will then set KE_INT and generate an interrupt to
the host processor. The state machine will continue to poll while there are keys pressed. If a key/s that was in
the key pressed register is released for 25 ms or greater, the state machine will set the appropriate keys in the
Key Event Status register with the key pressed bit cleared. If K_IEN is set it will set the K_INT and generate an
interrupt to the host processor.
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