Datasheet

TCA8418E
www.ti.com SCPS222B –MAY 2010–REVISED SEPTEMBER 2010
Table 3.
BIT
BYTE
7 (MSB) 6 5 4 3 2 1 0 (LSB)
I
2
C slave address 0 1 1 0 1 0 0 R/W
The last bit of the slave address defines the operation (read or write) to be performed. A high (1) selects a read
operation, while a low (0) selects a write operation.
Control Register and Command Byte
Following the successful acknowledgment of the address byte, the bus master sends a command byte, which is
stored in the control register in the TCA8418E. The command byte indicates the register that will be updated with
information. All registers can be read and written to by the system master.
Table 4 shows all the registers within this device and their descriptions. The default value in all registers is 0.
Table 4. Register Descriptions
REGISTER
ADDRESS REGISTER NAME 7 6 5 4 3 2 1 0
DESCRIPTION
0×00 Reserved Reserved
Configuration register OVR_F
GPI_E_ OVR_FL INT_ K_LC GPI_IE
0×01 CFG (interrupt processor AI LOW_I KE_IEN
CGF OW_M CFG K_IEN N
interrupt enables) EN
OVR_F
N/A N/A N/A K_LC GPI_
0×02 INT_STAT Interrupt status register N/A 0 LOW_I K_ INT
0 0 0 K_INT INT
NT
Key lock and event N/A K_LCK KLEC
0×03 KEY_LCK_EC LCK2 LCK1 KLEC3 KLEC1 KLEC0
counter register 0 _EN 2
KEA7 KEA6 KEA5 KEA4 KEA3 KEA2 KEA1 KEA0
0×04 KEY_EVENT_A Key event register A
0 0 0 0 0 0 0 0
KEB7 KEB6 KEB5 KEB4 KEB3 KEB2 KEB1 KEB0
0×05 KEY_EVENT_B Key event register B
0 0 0 0 0 0 0 0
KEC7 KEC6 KEC5 KEC4 KEC3 KEC2 KEC1 KEC0
0×06 KEY_EVENT_C Key event register C
0 0 0 0 0 0 0 0
KED7 KED6 KED5 KED4 KED3 KED2 KED1 KED0
0×07 KEY_EVENT_D Key event register D
0 0 0 0 0 0 0 0
KEE7 KEE6 KEE5 KEE4 KEE3 KEE2 KEE1 KEE0
0×08 KEY_EVENT_E Key event register E
0 0 0 0 0 0 0 0
KEF7 KEF6 KEF5 KEF4 KEF3 KEF2 KEF1 KEF0
0×09 KEY_EVENT_F Key event register F
0 0 0 0 0 0 0 0
KEG7 KEG6 KEG5 KEG4 KEG3 KEG2 KEG1 KEG0
0×0A KEY_EVENT_G Key event register G
0 0 0 0 0 0 0 0
KEH7 KEH6 KEH5 KEH4 KEH3 KEH2 KEH1 KEH0
0×0B KEY_EVENT_H Key event register H
0 0 0 0 0 0 0 0
KEI7 KEI6 KEI5 KEI4 KEI3 KEI2 KEI1 KEI0
0×0C KEY_EVENT_I Key event register I
0 0 0 0 0 0 0 0
KEJ7 KEJ6 KEJ5 KEJ64 KEJ3 KEJ2 KEJ1 KEJ0
0×0D KEY_EVENT_J Key event register J
0 0 0 0 0 0 0 0
Keypad lock 1 to lock 2
0×0E KP_LCK_TIMER KL7 KL6 KL5 KL4 KL3 KL2 KL1 KL0
timer
UK1_
0×0F Unlock1 Unlock key 1 UK1_7 UK1_6 UK1_5 UK1_4 UK1_3 UK1_1 UK1_0
2
UK2_
0×10 Unlock2 Unlock key2 UK2_7 UK2_6 UK2_5 UK2_4 UK2_3 UK2_1 UK2_0
2
R7IS R6IS R5IS R4IS R3IS R2IS R1IS R0IS
0×11 GPIO_INT_STAT1 GPIO interrupt status
0 0 0 0 0 0 0 0
C7IS C6IS C5IS C4IS C3IS C2IS C1IS C0IS
0×12 GPIO_INT_STAT2 GPIO interrupt status
0 0 0 0 0 0 0 0
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