Datasheet

TCA7408
SCPS235B –NOVEMBER 2011–REVISED MARCH 2013 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
The bidirectional voltage-level translation in the TCA7408 is provided through V
CCI
. V
CCI
should be connected to
the V
CC
of the external SCL/SDA lines. This indicates the V
CC
level of the I
2
C bus to the TCA7408. The voltage
level on the GPIO-port of the TCA7408 is determined by V
CCP
.
At power on, the I/Os are configured as inputs. However, the system master can enable the I/Os as either inputs
or outputs by writing to the I/O direction bits. The data for each input or output is kept in the corresponding Input
or Output Register. All registers can be read by the system master.
The system master can reset the TCA7408 in the event of a timeout or other improper operation by asserting a
low in the RESET input. The power-on reset (POR) puts the registers in their default state and initializes the
I
2
C/SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the
part. The system master can also execute a software reset by asserting B0 in register 01h. The POR, and
hardware reset events will reset the state machine and the registers to the default state. A software reset will
only reset the registers to the default state and will not reset the state machine. In addition the watch dog timer
only resets the state machine
The TCA7408 open-drain interrupt (INT) output is activated when any GPIO set as an input has a transition to
the state opposite of that in the Input Default State (09h) register and the corresponding bit in the Interrupt Mask
Register (11h) is set to 0. It is used to indicate to the system master that an input has changed to a pre-
determined state. INT is also activated after either a hardware reset or software reset. Watch dog timer does not
activate the INT pin.
INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the
remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via
the I
2
C bus. Thus, the TCA7408 can remain a simple slave device.
One hardware pin (ADDR) can be used to program the I
2
C address and allow up to two devices to share the
same I
2
C bus or SMBus.
The integrated watchdog timer will reset the I
2
C state machine in the event the SDA is internally held low, after
200 ms (nominal). This reset does not reset the registers as they retain their previous value.
ORDERING INFORMATION
(1)
T
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
–40°C to 85°C µCSP – ZSZ package Tape and reel TCA7408ZSZR ZUQ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
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