Datasheet
TCA6424
www.ti.com
SCPS175A –NOVEMBER 2007–REVISED NOVEMBER 2009
I
2
C INTERFACE TIMING REQUIREMENTS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 10)
STANDARD MODE FAST MODE
I
2
C BUS I
2
C BUS
UNIT
MIN MAX MIN MAX
f
scl
I
2
C clock frequency 0 100 0 400 kHz
t
sch
I
2
C clock high time 4 0.6 μs
t
scl
I
2
C clock low time 4.7 1.3 μs
t
sp
I
2
C spike time 0 50 0 50 ns
t
sds
I
2
C serial data setup time 250 100 ns
t
sdh
I
2
C serial data hold time 0 0 ns
t
icr
I
2
C input rise time 1000 20 + 0.1C
b
(1)
300 ns
t
icf
I
2
C input fall time 300 20 + 0.1C
b
(1)
300 ns
t
ocf
I
2
C output fall time; 10 pF to 400 pF bus 300 20 + 0.1C
b
(1)
300 μs
t
buf
I
2
C bus free time between Stop and Start 4.7 1.3 μs
t
sts
I
2
C Start or repeater Start condition setup time 4.7 0.6 μs
t
sth
I
2
C Start or repeater Start condition hold time 4 0.6 μs
t
sps
I
2
C Stop condition setup time 4 0.6 μs
t
vd(data)
Valid data time; SCL low to SDA output valid 1 1 μs
Valid data time of ACK condition; ACK signal from SCL low to SDA
t
vd(ack)
1 1 μs
(out) low
(1) C
b
= total capacitance of one bus line in pF
RESET TIMING REQUIREMENTS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 13)
STANDARD MODE FAST MODE
I
2
C BUS I
2
C BUS
UNIT
MIN MAX MIN MAX
t
W
Reset pulse duration 4 4 ns
t
REC
Reset recovery time 0 0 ns
t
RESET
Time to reset
(1)
600 600 ns
(1) Minimum time for SDA to become high or minimum time to wait before doing a START.
Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): TCA6424