Datasheet

TCA6416A
SCPS194A –MAY 2009–REVISED NOVEMBER 2009 www.ti.com
Register Descriptions
The Input Port registers (registers 0 and 1) reflect the incoming logic levels of the pins, regardless of whether the
pin is defined as an input or an output by the Configuration register. They act only on read operation. Writes to
these registers have no effect. The default value (X) is determined by the externally applied logic level. Before a
read operation, a write transmission is sent with the command byte to indicate to the I
2
C device that the Input
Port register will be accessed next.
Table 7. Registers 0 and 1 (Input Port Registers)
BIT I-07 I-06 I-05 I-04 I-03 I-02 I-01 I-00
DEFAULT X X X X X X X X
BIT I-17 I-16 I-15 I-14 I-13 I-12 I-11 I-10
DEFAULT X X X X X X X X
The Output Port registers (registers 2 and 3) shows\ the outgoing logic levels of the pins defined as outputs by
the Configuration register. Bit values in these registers have no effect on pins defined as inputs. In turn, reads
from these registers reflect the value that is in the flip-flop controlling the output selection, NOT the actual pin
value.
Table 8. Registers 2 and 3 (Output Port Registers)
BIT O-07 O-06 O-05 O-04 O-03 O-02 O-01 O-00
DEFAULT 1 1 1 1 1 1 1 1
BIT O-17 O-16 O-15 O-14 O-13 O-12 O-11 O-10
DEFAULT 1 1 1 1 1 1 1 1
The Polarity Inversion registers (register 4 and 5) allow polarity inversion of pins defined as inputs by the
Configuration register. If a bit in these registers is set (written with 1), the corresponding port pin's polarity is
inverted. If a bit in these registers is cleared (written with a 0), the corresponding port pin's original polarity is
retained.
Table 9. Registers 4 and 5 (Polarity Inversion Registers)
BIT P-07 P-06 P-05 P-04 P-03 P-02 P-01 P-00
DEFAULT 0 0 0 0 0 0 0 0
BIT P-17 P-16 P-15 P-14 P-13 P-12 P-11 P-10
DEFAULT 0 0 0 0 0 0 0 0
The Configuration registers (registers 6 and 7) configure the direction of the I/O pins. If a bit in these registers is
set to 1, the corresponding port pin is enabled as an input with a high-impedance output driver. If a bit in these
registers is cleared to 0, the corresponding port pin is enabled as an output.
Table 10. Registers 6 and 7 (Configuration Registers)
BIT C-07 C-06 C-05 C-04 C-03 C-02 C-01 C-00
DEFAULT 1 1 1 1 1 1 1 1
BIT C-17 C-16 C-15 C-14 C-13 C-12 C-11 C-10
DEFAULT 1 1 1 1 1 1 1 1
Power-On Reset
When power (from 0 V) is applied to V
CCP
, an internal power-on reset holds the TCA6416A in a reset condition
until V
CCP
has reached V
POR
. At that time, the reset condition is released, and the TCA6416A registers and
I
2
C/SMBus state machine initializes to their default states. After that, V
CCP
must be lowered to below V
PORF
and
back up to the operating voltage for a power-reset cycle.
8 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated
Product Folder Links: TCA6416A