Datasheet

Interrupt(INT)Output
BusTransactions
Writes
SCL
Start Condition
Data 1 Valid
SDA
Write to Port
Data Out
From Port
R/W
ACK From Slave ACK From Slave ACK From Slave
1 98765432
Data 1
1
00
1
S
00 0
AD
DR
0
A
0000000
A A P
Data to PortCommand ByteSlave Address
t
pv
1/0
00
1
S
00 0
AD
DR
0
A
1
000000
A A P
SCL
SDA
StartCondition R/W
ACKFromSlave ACKFromSlave ACKFromSlave
1 98765432
DatatoRegisterCommandByteSlave Address
Data
TCA6408A
SCPS192C–APRIL2009–REVISEDJULY2009............................................................................................................................................................. www.ti.com
Aninterruptisgeneratedbyarisingorfallingedgeoftheportinputsintheinputmode.Aftertimet
iv
,thesignal
INTisvalid.Resettingtheinterruptcircuitisachievedwhendataontheportischangedtotheoriginalsettingor
whendataisreadfromtheportthatgeneratedtheinterrupt.Resettingoccursinthereadmodeatthe
acknowledge(ACK)ornotacknowledge(NACK)bitaftertherisingedgeoftheSCLsignal.Interruptsthatoccur
duringtheACKorNACKclockpulsecanbelost(orbeveryshort)duetotheresettingoftheinterruptduringthis
pulse.EachchangeoftheI/OsafterresettingisdetectedandistransmittedasINT.
Readingfromorwritingtoanotherdevicedoesnotaffecttheinterruptcircuit,andapinconfiguredasanoutput
cannotcauseaninterrupt.ChanginganI/Ofromanoutputtoaninputmaycauseafalseinterrupttooccur,ifthe
stateofthepindoesnotmatchthecontentsoftheInputPortRegister.
TheINToutputhasanopen-drainstructureandrequiresapullupresistortoV
CCP
orV
CCI
dependingonthe
application.INTshouldbeconnectedtothevoltagesourceofthedevicethatrequirestheinterruptinformation.
DataisexchangedbetweenthemasterandTCA6408Athroughwriteandreadcommands.
DataistransmittedtotheTCA6408Abysendingthedeviceaddressandsettingtheleastsignificantbit(LSB)to
alogic0(seeFigure4fordeviceaddress).Thecommandbyteissentaftertheaddressanddetermineswhich
registerreceivesthedatathatfollowsthecommandbyte.Thereisnolimitationonthenumberofdatabytessent
inonewritetransmission.
Figure6.WritetoOutputPortRegister
<br/>
Figure7.WritetoConfigurationorPolarityInversionRegisters
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