Datasheet

www.ti.com
POWER DISSIPATION RATINGS
THERMAL CHARACTERISTICS
TB5T1
SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PART NUMBER PART MARKING PACKAGE
(1)
LEAD FINISH STATUS
TB5T1DW TB5T1 Gull-Wing SOIC NiPdAu Production
TB5T1D TB5T1 SOIC NiPdAu Production
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
THERMAL RESISTANCE, DERATING FACTOR
PACKAG CIRCUIT POWER RATING POWER RATING
JUNCTION-TO-AMBIENT
(1)
E BOARD MODEL T
A
≤ 25 ° C T
A
= 85 ° C
WITH NO AIR FLOW T
A
≥ 25 ° C
Low-K
(2)
752 mW 132.8 ° C/W 7.5 mW/ ° C 301 mW
D
High-K
(3)
1160 mW 85.8 ° C/W 11.7 mW/ ° C 466 mW
Low-K
(2)
814 mW 122.7 ° C/W 8.2 mW/ ° C 325 mW
DW
High-K
(3)
1200 mW 83.1 ° C/W 12 mW/ ° C 481 mW
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted with no air flow.
(2) In accordance with the low-K thermal metric definitions of EIA/JESD51-3.
(3) In accordance with the high-K thermal metric definitions of EIA/JESD51-7.
PARAMETER PACKAGE VALUE UNIT
D 48.4 ° C/W
θ
JB
Junction-to-board thermal resistance
DW 55.2 ° C/W
D 45.1 ° C/W
θ
JC
Junction-to-case thermal resistance
DW 48.1 ° C/W
2 Submit Documentation Feedback Copyright © 2003 – 2007, Texas Instruments Incorporated
Product Folder Link(s): TB5T1