Datasheet

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APPLICATION INFORMATION
Power Dissipation
40
60
80
100
120
140
0 100 200 300 400 500
D, Low−K
DW, Low−K
D, High−K
DW, High−K
Thermal Impedance − C/W
Air Flow − LFM
ȍ
ǒ
V
Sn
I
Sn
Ǔ
ȍ
(
V
Ln
I
Ln
)
T
J
+ T
A
)
ǒ
P
D
q
JA
Ǔ
T
J
+ T
A
)
ǒ
P
D
q
JA(S)
Ǔ
q
JA(S)
+
ƪǒ
q
JC
)q
CA
Ǔ
ǒ
q
JB
)q
BA
Ǔ
ƫ
ǒ
q
JC
)q
CA
)q
JB
)q
BA
Ǔ
TB5T1
SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007
The power dissipation rating, often listed as the
package dissipation rating, is a function of the
ambient temperature, T
A
, and the airflow around the
device. This rating correlates with the device's
maximum junction temperature, sometimes listed in
the absolute maximum ratings tables. The maximum
junction temperature accounts for the processes and
materials used to fabricate and package the device,
in addition to the desired life expectancy.
There are two common approaches to estimating the
internal die junction temperature, T
J
. In both of these
methods, the device internal power dissipation P
D
needs to be calculated This is done by totaling the
supply power(s) to arrive at the system power
dissipation:
Figure 17. Thermal Impedance vs Air Flow
and then subtracting the total power dissipation of the
external load(s):
The standardized θ
JA
values may not accurately
represent the conditions under which the device is
used. This can be due to adjacent devices acting as
heat sources or heat sinks, to nonuniform airflow, or
The first T
J
calculation uses the power dissipation
to the system PCB having significantly different
and ambient temperature, along with one parameter:
thermal characteristics than the standardized test
θ
JA
, the junction-to-ambient thermal resistance, in
PCBs. The second method of system thermal
degrees Celsius per watt.
analysis is more accurate. This calculation uses the
The product of P
D
and θ
JA
is the junction temperature
power dissipation and ambient temperature, along
rise above the ambient temperature. Therefore:
with two device and two system-level parameters:
• θ
JC
, the junction-to-case thermal resistance, in
degrees Celsius per watt
• θ
JB
, the junction-to-board thermal resistance, in
Note that θ
JA
is highly dependent on the PCB on
degrees Celsius per watt
which the device is mounted and on the airflow over
the device and PCB. JEDEC/EIA has defined
• θ
CA
, the case-to-ambient thermal resistance, in
standardized test conditions for measuring θ
JA
. Two
degrees Celsius per watt
commonly used conditions are the low-K and the
• θ
BA
, the board-to-ambient thermal resistance, in
high-K boards, covered by EIA/JESD51-3 and
degrees Celsius per watt.
EIA/JESD51-7 respectively. Figure 17 shows the
In this analysis, there are two parallel paths, one
low-K and high-K values of θ
JA
versus air flow for this
through the case (package) to the ambient, and
device and its package options.
another through the device to the PCB to the
ambient. The system-level junction-to-ambient
thermal impedance, θ
JA(S)
, is the equivalent parallel
impedance of the two parallel paths:
where
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