Datasheet

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APPLICATION INFORMATION
Power Dissipation
S(V
Sn
I
Sn
)
(1)
S(V
Ln
I
Ln
)
(2)
T
J
+ T
A
) (P
D
q
JA
)
(3)
T
J
+ T
A
) (P
D
q
JA(S)
)
(4)
q
JA(S)
+
(q
JC
) q
CA
) (q
JB
) q
BA
)
(q
JC
) q
CA
) q
JB
) q
BA
)
40
60
80
100
120
140
0 100 200 300 400 500
D, Low−K
DW, Low−K
D, High−K
DW, High−K
Thermal Impedance − C/W
Air Flow − LFM
TB5D1M , TB5D2H
SLLS579C SEPTEMBER 2003 REVISED JANUARY 2008
the device and PCB. JEDEC/EIA has defined
standardized test conditions for measuring θ
JA
. Two
commonly used conditions are the low-K and the
The power dissipation rating, often listed as the
high-K boards, covered by EIA/JESD51-3 and
package dissipation rating, is a function of the
EIA/JESD51-7 respectively. Figure 14 shows the
ambient temperature, T
A
, and the airflow around the
low-K and high-K values of θ
JA
versus air flow for this
device. This rating correlates with the device's
device and its package options.
maximum junction temperature, sometimes listed in
The standardized θ
JA
values may not accurately
the absolute maximum ratings tables. The maximum
represent the conditions under which the device is
junction temperature accounts for the processes and
used. This can be due to adjacent devices acting as
materials used to fabricate and package the device,
heat sources or heat sinks, to nonuniform airflow, or
in addition to the desired life expectancy.
to the system PCB having significantly different
There are two common approaches to estimating the
thermal characteristics than the standardized test
internal die junction temperature, T
J
. In both of these
PCBs. The second method of system thermal
methods, the device s internal power dissipation, P
D
,
analysis is more accurate. This calculation uses the
needs to be calculated. This is done by totaling the
power dissipation and ambient temperature, along
supply power(s) to arrive at the system power
with two device and two system-level parameters:
dissipation:
θ
JC
, the junction-to-case thermal resistance, in
degrees Celsius per watt
θ
JB
, the junction-to-board thermal resistance, in
and then subtracting the total power dissipation of the
degrees Celsius per watt
external load(s):
θ
CA
, the case-to-ambient thermal resistance, in
degrees Celsius per watt
θ
BA
, the board-to-ambient thermal resistance, in
The first T
J
calculation uses the power dissipation
degrees Celsius per watt.
and ambient temperature, along with one parameter:
θ
JA
, the junction-to-ambient thermal resistance, in
In this analysis, there are two parallel paths, one
degrees Celsius per watt.
through the case (package) to the ambient, and
another through the device to the PCB to the
The product of P
D
and θ
JA
is the junction temperature
ambient. The system-level junction-to-ambient
rise above the ambient temperature. Therefore:
thermal impedance, θ
JA(S)
, is the equivalent parallel
impedance of the two parallel paths:
where
The device parameters θ
JC
and θ
JB
account for the
internal structure of the device. The system-level
parameters θ
CA
and θ
BA
take into account details of
the PCB construction, adjacent electrical and
mechanical components, and the environmental
conditions including airflow. Finite element (FE), finite
difference (FD), or computational fluid dynamics
(CFD) programs can determine θ
CA
and θ
BA
. Details
on using these programs are beyond the scope of
this data sheet, but are available from the software
manufacturers.
Figure 14. Thermal Impedance vs Air Flow
Note that θ
JA
is highly dependent on the PCB on
which the device is mounted, and on the airflow over
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