Datasheet
SSTIMER
NC
PLL_FLTP
VR_ANA
PBTL
AVSS
PLL_FLTM
BST_A
NC
PVDD_AB
OUT_A
RESET
PVDD_AB
STEST
PDN
VR_DIG
OSC_RES
DVSSO
DVDD
MCLK
A_SEL_FAULT
SCLK
SDIN
LRCLK
AVDD
SDA
SCL
DVSS
GND
VREG
BST_B
NC
NC
OUT_C
PVDD_CD
BST_D
PGND_AB
OUT_B
PGND_CD
OUT_D
AGND
PGND_AB
NC
PGND_CD
PVDD_CD
BST_C
NC
GVDD_OUT
P0075-12
PHP Package
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TAS5727
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TAS5727
SLOS670 –NOVEMBER 2010
www.ti.com
DEVICE INFORMATION
PIN ASSIGNMENT
PIN FUNCTIONS
PIN
5-V
TYPE
(1)
TERMINATION
(2)
DESCRIPTION
TOLERANT
NAME NO.
AGND 30 P Local analog ground for power stage
A_SEL_FAULT 14 DIO This pin is monitored on the rising edge of RESET. A value of 0
(15-kΩ pulldown) sets the I
2
C device address to 0x54 and a value of
1 (15-kΩ pullup) sets it to 0x56. this dual-function pin can be
programmed to output internal power-stage errors.
AVDD 13 P 3.3-V analog power supply
AVSS 9 P Analog 3.3-V supply ground
BST_A 4 P High-side bootstrap supply for half-bridge A
BST_B 43 P High-side bootstrap supply for half-bridge B
BST_C 42 P High-side bootstrap supply for half-bridge C
BST_D 33 P High-side bootstrap supply for half-bridge D
DVDD 27 P 3.3-V digital power supply
DVSS 28 P Digital ground
(1) TYPE: A = analog; D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output
(2) All pullups are weak pullups and all pulldowns are weak pulldowns. The pullups and pulldowns are included to assure proper input logic
levels if the pins are left unconnected (pullups → logic 1 input; pulldowns → logic 0 input).
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