Datasheet

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TAS5727

SLOS670 –NOVEMBER 2010

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Table 4. Serial Control Interface Register Summary (continued)

NO. OF INITIALIZATION

SUBADDRESS REGISTER NAME CONTENTS

BYTES VALUE

0x3D 8 Reserved

(3)

0x3E DRC2 softening filter alpha 8 u[31:26], ae[25:0] 0x0008 0000

DRC2 softening filter omega u[31:26], oe[25:0] 0xFFF8 0000

0x3F DRC2 attack rate 8 u[31:26], at[25:0] 0x0008 0000

DRC2 release rate u[31:26], rt[25:0] 0xFFF8 0000

0x40 DRC1 attack threshold 4 T1[31:0] (9.23 format) 0x0800 0000

0x41–0x42 4 Reserved

(3)

0x43 DRC2 attack threshold 4 T2[31:0] (9.23 format) 0x0074 0000

0x44–0x45 4 Reserved

(3)

0x46 DRC control 4 Description shown in subsequent section 0x0000 0000

0x47–0x4E 4 Reserved

(3)

0x4F PWM switching rate control 4 u[31:4], src[3:0] 0x0000 0006

0x50 Bank switch control 4 Description shown in subsequent section 0x0F70 8000

0x51 Ch 1 output mixer 8 Ch 1 output mix1[1] 0x0080 0000

Ch 1 output mix1[0] 0x0000 0000

0x52 Ch 2 output mixer 8 Ch 2 output mix2[1] 0x0080 0000

Ch 2 output mix2[0] 0x0000 0000

0x53 16 Reserved

(3)

0x54 16 Reserved

(3)

0x56 Output post-scale 4 u[31:26], post[25:0] 0x0080 0000

0x57 Output pre-scale 4 u[31:26], pre[25:0] (9.17 format) 0x0002 0000

0x58 ch1_bq[10] 20 u[31:26], b0[25:0] 0x0080 0000

u[31:26], b1[25:0] 0x0000 0000

u[31:26], b2[25:0] 0x0000 0000

u[31:26], a1[25:0] 0x0000 0000

u[31:26], a2[25:0] 0x0000 0000

0x59 ch1_bq[11] 20 u[31:26], b0[25:0] 0x0080 0000

u[31:26], b1[25:0] 0x0000 0000

u[31:26], b2[25:0] 0x0000 0000

u[31:26], a1[25:0] 0x0000 0000

u[31:26], a2[25:0] 0x0000 0000

0x5A ch4_bq[0] 20 u[31:26], b0[25:0] 0x0080 0000

u[31:26], b1[25:0] 0x0000 0000

u[31:26], b2[25:0] 0x0000 0000

u[31:26], a1[25:0] 0x0000 0000

u[31:26], a2[25:0] 0x0000 0000

0x5B ch4_bq[1] 20 u[31:26], b0[25:0] 0x0080 0000

u[31:26], b1[25:0] 0x0000 0000

u[31:26], b2[25:0] 0x0000 0000

u[31:26], a1[25:0] 0x0000 0000

u[31:26], a2[25:0] 0x0000 0000

(3) Reserved registers should not be accessed.

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