Datasheet

A6 A5 A0 R/W ACK A7 A6 A5 A4 A0 ACK A6 A5 A0 ACK
Start
Condition
Stop
Condition
Acknowledge Acknowledge Acknowledge
I CDevice Addressand
2
Read/WriteBit
Subaddress DataByte
D7 D6 D1 D0 ACK
I CDevice Addressand
Read/WriteBit
2
Not
Acknowledge
R/WA1 A1
RepeatStart
Condition
T0036-03
A6 A0 ACK
Acknowledge
I CDevice Addressand
Read/WriteBit
2
R/WA6 A0 R/W ACK A0 ACK D7 D0 ACK
Start
Condition
Stop
Condition
Acknowledge Acknowledge Acknowledge
LastDataByte
ACK
FirstDataByte
RepeatStart
Condition
Not
Acknowledge
I CDevice Addressand
Read/WriteBit
2
Subaddress OtherDataBytes
A7 A6 A5 D7 D0 ACK
Acknowledge
D7 D0
T0036-04
TAS5717
TAS5719
www.ti.com SLOS655A –NOVEMBER 2010–REVISED FEBRUARY 2011
Single-Byte Read
As shown in Figure 38, a single-byte data-read transfer begins with the master device transmitting a start
condition followed by the I
2
C device address and the read/write bit. For the data-read transfer, both a write
followed by a read are actually done. Initially, a write is done to transfer the address byte or bytes of the internal
memory address to be read. As a result, the read/write bit becomes a 0. After receiving the TAS5717/9 address
and the read/write bit, TAS5717/9 responds with an acknowledge bit. In addition, after sending the internal
memory address byte or bytes, the master device transmits another start condition followed by the TAS5717/9
address and the read/write bit again. This time the read/write bit becomes a 1, indicating a read transfer. After
receiving the address and the read/write bit, the TAS5717/9 again responds with an acknowledge bit. Next, the
TAS5717/9 transmits the data byte from the memory address being read. After receiving the data byte, the
master device transmits a not-acknowledge followed by a stop condition to complete the single-byte data-read
transfer.
Figure 38. Single-Byte Read Transfer
Multiple-Byte Read
A multiple-byte data-read transfer is identical to a single-byte data-read transfer except that multiple data bytes
are transmitted by the TAS5717/9 to the master device as shown in Figure 39. Except for the last data byte, the
master device responds with an acknowledge bit after receiving each data byte.
Figure 39. Multiple-Byte Read Transfer
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