Datasheet
ABSOLUTE MAXIMUM RATINGS
TAS5716
www.ti.com
............................................................................................................................................................................................... SLOS569 – JANUARY 2009
PIN FUNCTIONS (continued)
PIN
TYPE 5-V TERMINATION
DESCRIPTION
(1)
TOLERANT
(2)
NAME NO.
RESET 16 DI 5-V Pullup Reset, active-low. A system reset is generated by applying a logic low
to this terminal. RESET is an asynchronous control signal that
restores the DAP to its default conditions, sets the VALID outputs low,
and places the PWM in the hard-mute state (stops switching). Master
volume is immediately set to full attenuation. Upon the release of
RESET, if PDN is high, the system performs a 4- to 5-ms device
initialization and sets the volume at mute.
SCL 29 DI 5-V I
2
C serial-control clock input
SCLK 23 DI 5-V Serial audio data clock (shift clock). SCLK is the serial audio-port input
data-bit clock.
SDA 28 DIO 5-V I
2
C serial-control data-interface input/output
SDIN1 25 DI 5-V Serial audio data-1 input is one of the serial data input ports. SDIN1
supports three discrete (stereo) data formats.
SDIN2 24 DI 5-V Serial audio data-2 input is one of the serial data input ports. SDIN2
supports three discrete (stereo) data formats.
STEST 31 DI Test terminal. Connect directly to GND.
SUB_PWM – 39 DO Subwoofer negative PWM output
SUB_PWM+ 40 DO Subwoofer positive PWM output
TEST2 32 DI Test terminal. Connect directly to DVDD.
VALID 36 DO Output indicating validity of ALL PWM channels, active-high. This
terminal is connected to an external power stage. If no external power
stage is used, leave this terminal floating.
VCLAMP_AB 60 P Internally generated voltage supply for channels A and B gate drive.
Not to be used as a supply or connected to any component other than
the decoupling capacitor
VCLAMP_CD 54 P Internally generated voltage supply for channels C and D gate drive.
Not to be used as a supply or connected to any component other than
the decoupling capacitor
VR_ANA 14 P Internally regulated 1.8-V analog supply voltage. This terminal must
not be used to power external devices.
VR_DIG 27 P Internally regulated 1.8-V digital supply voltage. This terminal must not
be used to power external devices.
VREG_EN 18 DI Pulldown Voltage regulator enable. Connect directly to GND.
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE UNIT
Supply voltage DVDD, AVDD – 0.3 to 3.6 V
PVCC – 0.3 to 30 V
Input voltage 3.3-V digital input – 0.5 to DVDD + 0.5 V
5-V tolerant
(2)
digital input – 0.5 to 6 V
Input clamp current, I
IK
(V
I
< 0 or V
I
> 1.8 V ± 20 mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> 1.8 V ± 20 mA
Operating free-air temperature 0 to 85 ° C
Operating junction temperature range 0 to 150 ° C
Storage temperature range, T
stg
– 40 to 125 ° C
(1) Stresses beyond those listed under absolute ratings may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under recommended operation conditions are
not implied. Exposure to absolute-maximum conditions for extended periods may affect device reliability.
(2) 5-V tolerant inputs are PDN, RESET, MUTE, SCLK, LRCLK, MCLK, SDIN1, SDIN2, SDA, SCL, and HPSEL.
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