Datasheet

VOLUME CONFIGURATION REGISTER (0x0E)
MODULATION LIMIT REGISTER (0x10)
TAS5716
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Bit D7: Reserved = 1
Bit D6: If 0, then biquad 1 (BQ1) volume compensation part only is disabled (default). If 1, then BQ1
volume compensation is enabled.
Bit D4: Reserved = 1
Bit D3: Reserved
Bits D2 – D0: Volume slew rate (Used to control volume change and MUTE ramp rates)
Table 12. Volume Control Register (0x0E)
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
1 – – – – – – – Reserved (must be 1)
(1)
– 0 – – – – – – Disable biquad volume compensation
(1)
– 1 – – – – – – Enable biquad volume compensation
– – 0 – – – – – Reserved
(1)
– – – 1 – – – – Reserved (must be 1)
(1)
– – – – 0 – – – Reserved
(1)
– – – – – 0 0 0 Volume slew 512 steps (44 ms volume ramp time)
– – – – – 0 0 1 Volume slew 1024 steps
(1)
(88 ms volume ramp time)
– – – – – 0 1 0 Volume slew 2048 steps (176 ms volume ramp time)
– – – – – 0 1 1 Volume slew 256 steps (22 ms volume ramp time)
– – – – – 1 X X Reserved
(1) Default values are in bold.
Set modulation limit. See the appropriate power stage data sheet for recommended modulation limits.
Table 13. Modulation Limit Register (0x10)
LIMIT
D7 D6 D5 D4 D3 D2 D1 D0 MIN WIDTH [DCLKs] MODULATION LIMIT
[DCLKs]
– – – – – 0 0 0 1 2 99.2%
– – – – – 0 0 1 2 4 98.4%
– – – – – 0 1 0 3 6 97.7%
(1)
– – – – – 0 1 1 4 8 96.9%
– – – – – 1 0 0 5 10 96.1%
– – – – – 1 0 1 6 12 95.3%
– – – – – 1 1 0 7 14 94.5%
– – – – – 1 1 1 8 16 93.8%
(1) Default values are in bold.
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