Datasheet

ERROR STATUS REGISTER (0x02)
SYSTEM CONTROL REGISTER 1 (0x03)
TAS5716
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............................................................................................................................................................................................... SLOS569 JANUARY 2009
Note that the error bits are sticky bits that are not cleared by the hardware. This means that the software must
clear the register (write zeroes) and then read them to determine if there are any persistent errors.
Table 5. Error Status Register (0x02)
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
1 MCLK error
1 PLL autolock error
1 SCLK error
1 LRCLK error
1 Frame slip
0 0 0 0 0 0 0 0 No errors
(1)
(1) Default values are in bold.
Note that the error bits are sticky bits that are not cleared by the hardware. This means that the software must
clear the register (write zeroes) and then read them to determine if there are any persistent errors.
Table 6. Error Status Register (0x02)
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
1 PLL autolock error
1 SCLK error
1 LRCLK error
1 Frame slip
0 0 0 0 0 0 0 0 No errors
(1)
(1) Default values are in bold.
The system control register 1 has several functions:
Bit D7: If 0, the dc-blocking filter for each channel is disabled.
If 1, the dc-blocking filter ( 3 dB cutoff < 1 Hz) for each channel is enabled (default).
Bit D5: If 0, use soft unmute on recovery from clock error. This is a slow recovery.
If 1, use hard unmute on recovery from clock error (default). This is a fast recovery.
Bit D3: If 0, clock autodetect is enabled (default).
If 1, clock autodetect is disabled.
Bit D2: If 0, soft start is enabled (default).
If 1, soft start is disabled.
Bits D1 D0: Select de-emphasis
Table 7. System Control Register 1 (0x03)
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
0 PWM high-pass (dc blocking) disabled
1 PWM high-pass (dc blocking) enabled
(1)
0 Reserved
(1)
0 Soft unmute on recovery from clock error
1 Hard unmute on recovery from clock error
(1)
0 Reserved
(1)
0 Enable clock autodetect
(1)
(1) Default values are in bold.
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