Datasheet

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TAS5716

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............................................................................................................................................................................................... SLOS569 – JANUARY 2009

Table 2. Serial Control Interface Register Summary (continued)

NO. OF INITIALIZATION

SUBADDRESS REGISTER NAME CONTENTS

BYTES VALUE

0x36 ch2_bq[6] 20 u[31:26], b0[25:0] 0x0080 0000

u[31:26], b1[25:0] 0x0000 0000

u[31:26], b2[25:0] 0x0000 0000

u[31:26], a1[25:0] 0x0000 0000

u[31:26], a2[25:0] 0x0000 0000

0x37 ch6_bq[0] 20 u[31:26], b0[25:0] 0x0080 0000

u[31:26], b1[25:0] 0x0000 0000

u[31:26], b2[25:0] 0x0000 0000

u[31:26], a1[25:0] 0x0000 0000

u[31:26], a2[25:0] 0x0000 0000

0x38 ch6_bq[1] 20 u[31:26], b0[25:0] 0x0080 0000

u[31:26], b1[25:0] 0x0000 0000

u[31:26], b2[25:0] 0x0000 0000

u[31:26], a1[25:0] 0x0000 0000

u[31:26], a2[25:0] 0x0000 0000

0x39 4 Reserved

(4)

0x3A DRC1 ae 8 u[31:26], ae[25:0] 0x0080 0000

DRC1 (1 – ae) u[31:26], (1 – ae)[25:0] 0x0000 0000

0x3B DRC1 aa 8 u[31:26], aa[25:0] 0x0080 0000

DRC1 (1 – aa) u[31:26], (1 – aa)[25:0] 0x0000 0000

0x3C DRC1 ad 8 u[31:26], ad[25:0] 0x0080 0000

DRC1 (1 – ad) u[31:26], (1 – ad)[25:0] 0x0000 0000

0x3D DRC2 ae 8 u[31:26], ae[25:0] 0x0080 0000

DRC 2 (1 – ae) u[31:26], (1 – ae)[25:0] 0x0000 0000

0x3E DRC2 aa 8 u[31:26], aa[25:0] 0x0080 0000

DRC2 (1 – aa) u[31:26], (1 – aa)[25:0] 0x0000 0000

0x3F DRC2 ad 8 u[31:26], ad[25:0] 0x0080 0000

DRC2 (1 – ad) u[31:26], (1 – ad)[27::0] 0x0000 0000

0x40 DRC1-T 4 T1[31:0] 0xFDA2 1490

0x41 DRC1-K 4 u[31:26], k1[25:0] 0x0384 2109

0x42 DRC1-O 4 u[31:24], O[23:16], O1[15:0] 0x0008 4210

0x43 DRC2-T 4 T2[31:0] 0xFDA2 1490

0x44 DRC2-K 4 u[31:24], k2'[22:0] 0x0384 2109

0x45 DRC2-O 4 u[31:24], O2[25:0] 0x0008 4210

0x46 DRC control 4 u[31:2], ch6[1], ch1_5[0] 0x0000 0000

0x47 – 0x49 4 Reserved

(4)

0x0000 0000

0x50 4 Bank update command register 0x0000 0000

0x51 8 V1OM3[31:0] 0x0000 0000

V1OM1[31:0] 0x0080 0000

0x52 12 V2OM6[31:0] 0x0000 0000

V2OM4[31:0] 0x0000 0000

V2OM2[31:0] 0x0080 0000

0x53 – 0xFF 4 Reserved

(4)

0x0000 0000

(4) Reserved registers should not be accessed.

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