Datasheet

SERIAL AUDIO PORTS SLAVE MODE
TAS5716
www.ti.com ............................................................................................................................................................................................... SLOS569 – JANUARY 2009
over recommended operating conditions (unless otherwise noted)
TEST
PARAMETER MIN TYP MAX UNIT
CONDITIONS
f
SCLKIN
Frequency, SCLK 32 × f
S
, 48 × f
S
, 64 × f
S
C
L
= 30 pF 1.024 12.288 MHz
t
su1
Setup time, LRCLK to SCLK rising edge 10 ns
t
h1
Hold time, LRCLK from SCLK rising edge 10 ns
t
su2
Setup time, SDIN to SCLK rising edge 10 ns
t
h2
Hold time, SDIN from SCLK rising edge 10 ns
LRCLK frequency 32 48 192 kHz
SCLK duty cycle 40% 50% 60%
LRCLK duty cycle 40% 50% 60%
SCLK
SCLK rising edges between LRCLK rising edges 32 64
edges
t
(edge)
SCLK
LRCLK clock edge with respect to the falling edge of SCLK – 1/4 1/4
period
Figure 1. Slave-Mode Serial-Data Interface Timing
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