Datasheet

TAS5715
www.ti.com
SLOS645 AUGUST 2010
Table 7. System Control Register 1 (0x03)
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
0 PWM high-pass (dc blocking) disabled
1 PWM high-pass (dc blocking) enabled
(1)
0 Reserved
(1)
0 Soft unmute on recovery from clock error
1 Hard unmute on recovery from clock error
(1)
1 Reserved
(1)
0 Reserved
(1)
0 Reserved
(1)
0 0 No de-emphasis
(1)
0 1 De-emphasis for f
S
= 32 kHz
1 0 De-emphasis for f
S
= 44.1 kHz
1 1 De-emphasis for f
S
= 48 kHz
(1) Default values are in bold.
SERIAL DATA INTERFACE REGISTER (0x04)
As shown in Table 8, the TAS5715 supports nine serial data modes. The default is 24-bit, I
2
S mode.
Table 8. Serial Data Interface Control Register (0x04) Format
RECEIVE SERIAL DATA WORD
D7–D4 D3 D2 D1 D0
INTERFACE FORMAT LENGTH
Right-justified 16 0000 0 0 0 0
Right-justified 20 0000 0 0 0 1
Right-justified 24 0000 0 0 1 0
I
2
S 16 000 0 0 1 1
I
2
S 20 0000 0 1 0 0
I
2
S
(1)
24 0000 0 1 0 1
Left-justified 16 0000 0 1 1 0
Left-justified 20 0000 0 1 1 1
Left-justified 24 0000 1 0 0 0
Reserved 0000 1 0 0 1
Reserved 0000 1 0 1 0
Reserved 0000 1 0 1 1
Reserved 0000 1 1 0 0
Reserved 0000 1 1 0 1
Reserved 0000 1 1 1 0
Reserved 0000 1 1 1 1
(1) Default values are in bold.
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