Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- DEVICE INFORMATION
- ABSOLUTE MAXIMUM RATINGS
- THERMAL INFORMATION
- RECOMMENDED OPERATING CONDITIONS
- PWM OPERATION AT RECOMMENDED OPERATING CONDITIONS
- PLL INPUT PARAMETERS AND EXTERNAL FILTER COMPONENTS
- ELECTRICAL CHARACTERISTICS
- DC Characteristics
- AC Characteristics (BTL)
- SERIAL AUDIO PORTS SLAVE MODE
- I2C SERIAL CONTROL PORT OPERATION
- RESET TIMING (RESET)
- TYPICAL CHARACTERISTICS, BTL CONFIGURATION
- TYPICAL CHARACTERISTICS, SE CONFIGURATION
- TYPICAL CHARACTERISTICS, PBTL CONFIGURATION
- DETAILED DESCRIPTION
- POWER SUPPLY
- ERROR REPORTING
- DEVICE PROTECTION SYSTEM
- SSTIMER FUNCTIONALITY
- CLOCK, AUTO DETECTION, AND PLL
- SERIAL DATA INTERFACE
- PWM Section
- SERIAL INTERFACE CONTROL AND TIMING
- I2C SERIAL CONTROL INTERFACE
- Output Mode and MUX Selection
- 2.1-Mode Support
- Single-Filter PBTL-Mode Support
- Dynamic Range Control (DRC)
- BANK SWITCHING
- 26-Bit 3.23 Number Format
- Recommended Use Model
- CLOCK CONTROL REGISTER (0x00)
- DEVICE ID REGISTER (0x01)
- ERROR STATUS REGISTER (0x02)
- SYSTEM CONTROL REGISTER 1 (0x03)
- SERIAL DATA INTERFACE REGISTER (0x04)
- SYSTEM CONTROL REGISTER 2 (0x05)
- SOFT MUTE REGISTER (0x06)
- VOLUME REGISTERS (0x07, 0x08, 0x09, 0x0A)
- VOLUME CONFIGURATION REGISTER (0x0E)
- MODULATION LIMIT REGISTER (0x10)
- INTERCHANNEL DELAY REGISTERS (0x11, 0x12, 0x13, and 0x14)
- PWM SHUTDOWN GROUP REGISTER (0x19)
- START/STOP PERIOD REGISTER (0x1A)
- OSCILLATOR TRIM REGISTER (0x1B)
- BKND_ERR REGISTER (0x1C)
- INPUT MULTIPLEXER REGISTER (0x20)
- CHANNEL 4 SOURCE SELECT REGISTER (0x21)
- PWM OUTPUT MUX REGISTER (0x25)
- DRC CONTROL (0x46)
- BANK SWITCH AND EQ CONTROL (0x50)
- Revision History
TAS5711
SLOS600A –DECEMBER 2009–REVISED AUGUST 2010
www.ti.com
VOLUME REGISTERS (0x07, 0x08, 0x09, 0x0A)
Step size is 0.5 dB.
Master volume – 0x07 (default is mute)
Channel-1 volume – 0x08 (default is 0 dB)
Channel-2 volume – 0x09 (default is 0 dB)
Channel-3 volume – 0x0A (default is 0 dB)
Table 12. Volume Registers (0x07, 0x08, 0x09, 0x0A)
D D D D D D D D
FUNCTION
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 24 dB
0 0 1 1 0 0 0 0 0 dB (default for individual channel volume)
(1)
1 1 1 1 1 1 1 0 –103 dB
1 1 1 1 1 1 1 1 Soft mute
(1) Default values are in bold.
VOLUME CONFIGURATION REGISTER (0x0E)
Bits Volume slew rate (Used to control volume change and MUTE ramp rates). These bits control the
D2–D0: number of steps in a volume ramp.Volume steps occur at a rate that depends on the sample rate of
the I2S data as follows
Sample Rate (KHz) Approximate Ramp Rate
8/16/32 125 us/step
11.025/22.05/44.1 90.7 us/step
12/24/48 83.3 us/step
Table 13. Volume Control Register (0x0E)
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
1 – – 1 0 – – – Reserved
(1)
– 0 – – – – – – Subchannel (ch4) volume = ch1 volume
(2)(1)
– 1 – – – – – – Subchannel volume = register 0x0A
(2)
– – 0 – – – – – Ch3 volume = ch2 volume
(1)
– – 1 – – – – – Ch3 volume = register 0x0A
– – – – – 0 0 0 Volume slew 512 steps (43-ms volume ramp time at 48 kHz)
– – – – – 0 0 1 Volume slew 1024 steps (85-ms volume ramp time at 48 kHz)
(1)
– – – – – 0 1 0 Volume slew 2048 steps (171- ms volume ramp time at 48 kHz)
– – – – – 0 1 1 Volume slew 256 steps (21-ms volume ramp time at 48 kHz)
– – – – – 1 X X Reserved
(1) Default values are in bold.
(2) Bits 6:5 can be changed only when volume is in MUTE [master volume = MUTE (register 0x07 = 0xFF)].
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