Datasheet

23
22
SCLK
24Clks
LRCLK
LeftChannel
24-BitMode
1
19 18
20-BitMode
16-BitMode
15
14
MSB LSB
24Clks
RightChannel
2-ChannelLeft-JustifiedStereoInput(24-Bit TransferWordSize)
T0092-02
4
5
9 8
17
16
1
4
5
13
12
1
9 8
0
0
0
21
17
13
23
22
SCLK
1
19 18
15
14
MSB LSB
4
5
9 8
17
16
1
4
5
13
12
1
9 8
0
0
0
21
17
13
SCLK
16Clks
LRCLK
LeftChannel
16-BitMode
1 1
15 15
14 14
MSB LSB
16Clks
RightChannel
2-ChannelLeft-JustifiedStereoInput
T0266-02
3 3
2 2
5 5
4 4
9 98 80 0
13 13
10 10
11 1112 12
SCLK
MSB LSB
TAS5711
SLOS600A –DECEMBER 2009–REVISED AUGUST 2010 www.ti.com
NOTE: All data presented in 2s-complement form with MSB first.
Figure 41. Left-Justified 48-f
S
Format
NOTE: All data presented in 2s-complement form with MSB first.
Figure 42. Left-Justified 32-f
S
Format
Right-Justified
Right-justified (RJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when
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