Datasheet
48-PIN, HTQFP PACKAGE (TOP VIEW)
PGND_A
PVCC_A
PLL_FLTP
VR_ANA
PVCC_A
AVSS
PLL_FLTM
OUT_A
PGND_A
PGND_B
OUT_B
RESET
PGND_B
STEST
PDN
VR_DIG
OSC_RES
DVSSO
DVDD
MCLK
FAULT
SCLK
SDIN
LRCLK
A
VDD
SDA
SCL
DVSS
PVCC_D
PGND_D
AVCC
HIZ
BST_D
VCLAMP_CD
PGND_C
OUT_D
BST_B
VCLAMP_AB
PVCC_C
OUT_C
PVCC_D
PVCC_B
BST_A
BST_C
PGND_C
AGND
BYPASS
PGND_D
P0075-03
PHP Package
(TopView)
TAS5710
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 16
17
18 19 20
21 22
23
24
25
26
27
28
29
30
31
32
48
47
46
45 44
43 42 41 40 39 38 37
36
35
34
33
TAS5710
www.ti.com
............................................................................................................................................................................................... SLOS605 – JANUARY 2009
PIN FUNCTIONS
PIN
TYPE 5-V TERMINATION
DESCRIPTION
(1)
TOLERANT
(2)
NAME NO.
AGND 42 P Analog ground for power stage
AVCC 43 P Analog power supply for power stage. Connect externally to same
potential as PVCC.
AVDD 13 P 3.3-V analog power supply
AVSS 9 P Analog 3.3-V supply ground
BST_A 45 P High-side bootstrap supply for half-bridge A
BST_B 47 P High-side bootstrap supply for half-bridge B
BST_C 38 P High-side bootstrap supply for half-bridge C
BST_D 40 P High-side bootstrap supply for half-bridge D
BYPASS 41 AO Nominally equal to V
CC
/8. Internal reference voltage for analog cells
DVDD 27 P 3.3-V digital power supply
DVSS 28 P Digital ground
DVSSO 17 P Oscillator Ground
HIZ 44 DI Pullup Enable high-impedance (Hi-Z) mode (active low)
(1) TYPE: A = analog; D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output
(2) All pullups are weak pullups and all pulldowns are weak pulldowns. The pullups and pulldowns are included to assure proper input logic
levels if the pins are left unconnected (pullups → logic 1 input; pulldowns → logic 0 input).
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