Datasheet
MODULATIONLIMITREGISTER(0x10)
INTERCHANNELDELAYREGISTERS(0x11,0x12,0x13,0x14,0x15,0x16)
OFFSETREGISTER(0x17)
TAS5706A
TAS5706B
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.............................................................................................................................................SLOS606D–MARCH2009–REVISEDSEPTEMBER2009
Setmodulationlimit.Seetheappropriatepowerstagedatasheetforrecommendedmodulationlimits.
Table12.ModulationLimitRegister(0x10)
LIMIT
D7D6D5D4D3D2D1D0MINWIDTH[DCLKs]MODULATIONLIMIT
[DCLKs]
–––––0001299.2%
–––––0012498.4%
–––––0103697.7%
–––––0114896.9%
–––––10051096.1%
–––––10161295.3%
–––––11071494.5%
–––––11181693.8%
InternalPWMChannels1,2,3,4,5,and6aremappedintoregisters0x11,0x12,0x13,0x14,0x15,and0x16.
Table13.ChannelInterchannelDelayRegisterFormat
BITSDEFINITIOND7D6D5D4D3D2D1D0FUNCTION
Minimumabsolutedelay,0DCLKcycles,defaultfor
00000000
channel0
(1)
01111100Maximumpositivedelay,31×4DCLKcycles
10000000Maximumnegativedelay,–32×4DCLKcycles
00Unusedbits
A
SUBADDRESSD7D6D5D4D3D2D1D0Delay=(value)×4DCLKs
0x1101001100Defaultvalueforchannel1
(1)
19
0x1200110100Defaultvalueforchannel2
(1)
13
0x1300011100Defaultvalueforchannel3
(1)
7
0x1401100100Defaultvalueforchannel4
(1)
25
0x1511010000Defaultvalueforchannel5
(1)
–12
0x1610010000Defaultvalueforchannel6
(1)
-28
(1)Defaultvaluesareinbold.
Theoffsetregisterismappedinto0x17.
Table14.ChannelOffsetRegisterFormat
D7D6D5D4D3D2D1D0FUNCTION
00000000Minimumabsoluteoffset,0DCLKcycles,defaultforchannel0
(1)
11111111Maximumabsoluteoffset,255DCLKcycles
(1)Defaultvaluesareinbold.
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TAS5706A is Not Recommended for New Designs