Datasheet

Left-Justified
23
22
SCLK
32Clks
LRCLK
LeftChannel
24-BitMode
1
19 18
20-BitMode
16-BitMode
15
14
MSB LSB
32Clks
RightChannel
2-ChannelLeft-JustifiedStereoInput
T0034-02
4
5
9 8
1
4
5
1
0
0
0
23
22 1
19 18
15
14
MSB LSB
4
5
9 8
1
4
5
1
0
0
0
SCLK
TAS5706A
TAS5706B
SLOS606D–MARCH2009–REVISEDSEPTEMBER2009............................................................................................................................................. www.ti.com
Left-justified(LJ)timingusesLRCLKtodefinewhenthedatabeingtransmittedisfortheleftchannelandwhenit
isfortherightchannel.LRCLKishighfortheleftchannelandlowfortherightchannel.Abitclockrunningat32,
48,or64×f
S
isusedtoclockinthedata.ThefirstbitofdataappearsonthedatalinesatthesametimeLRCLK
toggles.ThedataiswrittenMSBfirstandisvalidontherisingedgeofthebitclock.TheDAPmasksunused
trailingdatabitpositions.
NOTE:Alldatapresentedin2s-complementformwithMSBfirst.
Figure33.Left-Justified64-f
S
Format
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TAS5706A is Not Recommended for New Designs