Datasheet

I
2
STiming
23
22
SCLK
32Clks
LRCLK(NoteReversedPhase)
LeftChannel
24-BitMode
1
19 18
20-BitMode
16-BitMode
15
14
MSB LSB
32Clks
RightChannel
2-ChannelI S(PhilipsFormat)StereoInput
2
T0034-01
5
4
9 8
1
0
0
4
5
1
0
23
22 1
19 18
15
14
MSB LSB
5
4
9 8
1
0
0
4
5
1
0
SCLK
TAS5706A
TAS5706B
SLOS606D–MARCH2009–REVISEDSEPTEMBER2009............................................................................................................................................. www.ti.com
I
2
StimingusesLRCLKtodefinewhenthedatabeingtransmittedisfortheleftchannelandwhenitisforthe
rightchannel.LRCLKislowfortheleftchannelandhighfortherightchannel.Abitclockrunningat32,48,or
64×f
S
isusedtoclockinthedata.ThereisadelayofonebitclockfromthetimetheLRCLKsignalchanges
statetothefirstbitofdataonthedatalines.ThedataiswrittenMSBfirstandisvalidontherisingedgeofbit
clock.TheDAPmasksunusedtrailingdatabitpositions.
NOTE:Alldatapresentedin2s-complementformwithMSBfirst.
Figure30.I
2
S64-f
S
Format
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TAS5706A is Not Recommended for New Designs