Datasheet

DETAILEDDESCRIPTION
POWERSUPPLY
CLOCK,AUTODETECTION,ANDPLL
SERIALDATAINTERFACE
PWMSection
I
2
CCOMPATIBLESERIALCONTROLINTERFACE
TAS5706A
TAS5706B
SLOS606D–MARCH2009–REVISEDSEPTEMBER2009............................................................................................................................................. www.ti.com
Thedigitalportionofthechiprequires3.3V,andthepowerstagescanworkfrom10Vto26V.
TheTAS5706ADAPisaslavedevice.ItacceptsMCLK,SCLK,andLRCLK.Thedigitalaudioprocessor(DAP)
supportsallthesampleratesandMCLKratesthataredefinedintheclockcontrolregister.
TheTAS5706AcheckstoverifythatSCLKisaspecificvalueof32f
S
,48f
S
,or64f
S
.TheDAPonlysupportsa1
×f
S
LRCLK.ThetimingrelationshipoftheseclockstoSDIN1/2isshowninsubsequentsections.Theclock
sectionusesMCLKortheinternaloscillatorclock(whenMCLKisunstableorabsent)toproducetheinternal
clock.
TheDAPcanautodetectandsettheinternalclockcontrollogictotheappropriatesettingsforthefrequenciesof
32kHz,normalspeed(44.1or48kHz),doublespeed(88.2kHzor96kHz),andquadspeed(176.4kHzor
192kHz).TheautomaticsampleratedetectioncanbedisabledandthevaluessetviaI
2
Cintheclockcontrol
register.
TheDAPalsosupportsanAMinterference-avoidancemodeduringwhichtheclockrateisadjusted,inconcert
withthePWMsamplerateconverter,toproduceaPWMoutputat7×f
S
,8×f
S
,or6×f
S
.
ThesampleratemustbesetmanuallyduringAMinterferenceavoidanceandwhende-emphasisisenabled.
SerialdataisinputonSDIN1/2.ThePWMoutputsarederivedfromSDIN1/2.TheTAS5706ADAPaccepts32-,
44.1-,48-,88.2-,96-,176.4-,and192-kHzserialdatain16-,18-,20-,or24-bitdatainleft-justified,right-justified,
andI
2
Sserialdataformats.
TheTAS5706ADAPdeviceusesnoise-shapingandsophisticatederrorcorrectionalgorithmstoachievehigh
powerefficiencyandhigh-performancedigitalaudioreproduction.TheDAPusesafourth-ordernoiseshaperthat
has>100-dBSNRperformancefrom20Hzto20kHz.ThePWMsectionaccepts24-bitPCMdatafromtheDAP
andoutputsfourPWMaudiooutputchannels.TAS5706APWMsectionoutputsupportsbridge-tiedloads.
ThePWMsectionhasindividualchanneldcblockingfiltersthatcanbeenabledanddisabled.Thefiltercutoff
frequencyislessthan1Hz.Individualchannelde-emphasisfiltersfor32-,44.1-,and48-kHzareincludedand
canbeenabledanddisabled.
Finally,thePWMsectionhasanadjustablemaximummodulationlimitof93.8%to99.2%.
TheTAS5706ADAPhasanI
2
Cserialcontrolslaveinterfacetoreceivecommandsfromasystemcontroller.The
serialcontrolinterfacesupportsbothnormal-speed(100-kHz)andhigh-speed(400-kHz)operationswithoutwait
states.Asanaddedfeature,thisinterfaceoperatesevenifMCLKisabsent.
Theserialcontrolinterfacesupportsbothsingle-byteandmulti-bytereadandwriteoperationsforstatusregisters
andthegeneralcontrolregistersassociatedwiththePWM.
TheI
2
CinterfacesupportsaspecialmodewhichpermitsI
2
Cwriteoperationstobebrokenupintomultiple-data
writeoperationsthataremultiplesof4databytes.Theseare6-,10-,14-,18-,...etc.,-bytewriteoperationsthat
arecomposedofadeviceaddress,read/writebit,subaddress,andanymultipleof4bytesofdata.Thispermits
thesystemtowritelargeregistervaluesincrementallywithoutblockingotherI
2
Ctransactions.
22SubmitDocumentationFeedbackCopyright©2009,TexasInstrumentsIncorporated
ProductFolderLink(s):TAS5706ATAS5706B
TAS5706A is Not Recommended for New Designs